LM3S3768 Luminary Micro, Inc, LM3S3768 Datasheet - Page 239

• Manufacturer Part Number: LM3S3768
• Description: Lm3s3768 Arm Microcontroller
• Manufacturer: Luminary Micro, Inc

Reset
Reset
Reset
Reset
Type
Type
Type
Type
DMAERRCLR Reads
DMA Bus Error Clear (DMAERRCLR)
Base 0x400F.F000
Offset 0x04C
Type RO, reset 0x0000.0000
DMAERRCLR Writes
DMA Bus Error Clear (DMAERRCLR)
Base 0x400F.F000
Offset 0x04C
Type WO, reset 0x0000.0000
June 02, 2008
Bit/Field
31:1
RO
RO
0
RO
RO
31
15
31
15
0
0
0
0
RO
RO
RO
RO
Register 20: DMA Bus Error Clear (DMAERRCLR), offset 0x04C
The DMAERRCLR register is used to read and clear the DMA bus error status. The error status
will be set if the μDMA controller encountered a bus error while performing a DMA transfer. If a bus
error occurs on a channel, that channel will be automatically disabled by the μDMA controller. The
other channels are unaffected.
30
14
30
14
0
0
0
0
RO
RO
RO
RO
29
13
ERRCLR
29
13
reserved
0
0
0
0
Name
RO
RO
RO
RO
28
12
28
12
0
0
0
0
RO
RO
RO
RO
27
11
27
11
0
0
0
0
Type
RO
R
RO
RO
RO
RO
26
10
26
10
0
0
0
0
RO
RO
RO
RO
Reset
25
25
0x00
0
9
0
0
9
0
0
reserved
reserved
Preliminary
RO
RO
RO
RO
24
24
0
8
0
0
8
0
reserved
reserved
Description
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
DMA Bus Error Status
Value
0
1
RO
RO
RO
RO
23
23
0
7
0
0
7
0
Description
Low
No bus error is pending.
High
Bus error is pending.
RO
RO
RO
RO
22
22
0
6
0
0
6
0
RO
RO
RO
RO
21
21
0
5
0
0
5
0
RO
RO
RO
RO
20
20
0
4
0
0
4
0
RO
RO
RO
RO
19
19
0
3
0
0
3
0
LM3S3768 Microcontroller
RO
RO
RO
RO
18
18
0
2
0
0
2
0
RO
RO
RO
RO
17
17
0
1
0
0
1
0
ERRCLR
ERRCLR
RO
RO
16
16
W
R
0
0
0
0
0
0
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