LM3S3768 Luminary Micro, Inc, LM3S3768 Datasheet - Page 164
LM3S3768
Manufacturer Part Number
LM3S3768
Description
Lm3s3768 Arm Microcontroller
Manufacturer
Luminary Micro, Inc
Datasheet
1.LM3S3768.pdf
(755 pages)
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Internal Memory
8.4
Table 8-3. Flash Register Map
164
ROM Registers (System Control Offset)
Flash Registers (Flash Control Offset)
Flash Registers (System Control Offset)
Offset
0x00C
0x1D0
0x1EC
0x0F0
0x000
0x004
0x008
0x010
0x014
0x0F4
0x130
0x200
0x134
0x400
0x140
0x1E0
0x1E4
0x1E8
0x204
0x208
Name
RMCTL
FMA
FMD
FMC
FCRIS
FCIM
FCMISC
RMVER
FMPRE0
FMPRE0
FMPPE0
FMPPE0
USECRL
USER_DBG
USER_REG0
USER_REG1
USER_REG2
USER_REG3
FMPRE1
FMPRE2
a. Which FMPREn and FMPPEn registers are available depend on the flash size of your particular Stellaris
Register Map
Table 8-3 on page 164 lists the ROM Controller registers and the Flash memory and control registers.
The offset listed is a hexadecimal increment to the register's address. The ROM Controller registers
are relative to the System Control base address of 0x400F.E000. The FMA, FMD, FMC, FCRIS,
FCIM, and FCMISC registers are relative to the Flash control base address of 0x400F.D000. The
FMPREn, FMPPEn, USECRL, USER_DBG, and USER_REGn registers are relative to the System
Control base address of 0x400F.E000.
Register to be Committed
USER_DBG
R/W1C
R/W1C
Type
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
RO
RO
0x7510.0000
FMA Value
0xFFFF.FFFF
0xFFFF.FFFF
0xFFFF.FFFF
0xFFFF.FFFF
0xFFFF.FFFE
0xFFFF.FFFF
0xFFFF.FFFF
0xFFFF.FFFF
0xFFFF.FFFF
0xFFFF.FFFF
0x0000.0000
0x0000.0000
0x0000.0000
0x0000.0000
0x0000.0000
0x0000.0000
0x0000.0000
0x0000.0000
Reset
0x31
-
FMD
Data Source
Preliminary
Description
ROM Control
Flash Memory Address
Flash Memory Data
Flash Memory Control
Flash Controller Raw Interrupt Status
Flash Controller Interrupt Mask
Flash Controller Masked Interrupt Status and Clear
ROM Version Register
Flash Memory Protection Read Enable 0
Flash Memory Protection Read Enable 0
Flash Memory Protection Program Enable 0
Flash Memory Protection Program Enable 0
USec Reload
User Debug
User Register 0
User Register 1
User Register 2
User Register 3
Flash Memory Protection Read Enable 1
Flash Memory Protection Read Enable 2
June 02, 2008
®
device.
page
See
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