LM3S3768 Luminary Micro, Inc, LM3S3768 Datasheet - Page 414

• Manufacturer Part Number: LM3S3768
• Description: Lm3s3768 Arm Microcontroller
• Manufacturer: Luminary Micro, Inc

Reset
Reset
Type
Type
Universal Asynchronous Receivers/Transmitters (UARTs)
UART Interrupt Clear (UARTICR)
UART0 base: 0x4000.C000
UART1 base: 0x4000.D000
Offset 0x044
Type W1C, reset 0x0000.0000
414
Bit/Field
31:11
10
RO
RO
9
8
31
15
0
0
RO
RO
Register 13: UART Interrupt Clear (UARTICR), offset 0x044
The UARTICR register is the interrupt clear register. On a write of 1, the corresponding interrupt
(both raw interrupt and masked interrupt, if enabled) is cleared. A write of 0 has no effect.
30
14
0
0
reserved
RO
RO
29
13
reserved
0
0
Name
OEIC
BEIC
PEIC
RO
RO
28
12
0
0
RO
RO
27
11
0
0
W1C
W1C
W1C
Type
RO
OEIC
W1C
RO
26
10
0
0
BEIC
W1C
RO
Reset
25
0x00
0
9
0
0
0
0
Preliminary
PEIC
W1C
RO
24
0
8
0
reserved
Description
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
Overrun Error Interrupt Clear
The OEIC values are defined as follows:
Break Error Interrupt Clear
The BEIC values are defined as follows:
Parity Error Interrupt Clear
The PEIC values are defined as follows:
Value
Value
Value
0
1
0
1
0
1
FEIC
W1C
RO
23
0
7
0
Description
No effect on the interrupt.
Clears interrupt.
Description
No effect on the interrupt.
Clears interrupt.
Description
No effect on the interrupt.
Clears interrupt.
RTIC
W1C
RO
22
0
6
0
TXIC
W1C
RO
21
0
5
0
RXIC
W1C
RO
20
0
4
0
RO
RO
19
0
3
0
RO
RO
18
0
2
0
reserved
RO
RO
17
0
1
0
June 02, 2008
RO
RO
16
0
0
0