LM3S3768 Luminary Micro, Inc, LM3S3768 Datasheet - Page 416

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LM3S3768

Manufacturer Part Number
LM3S3768
Description
Lm3s3768 Arm Microcontroller
Manufacturer
Luminary Micro, Inc
Datasheet
Reset
Reset
Type
Type
Universal Asynchronous Receivers/Transmitters (UARTs)
UART DMA Control (UARTDMACTL)
UART0 base: 0x4000.C000
UART1 base: 0x4000.D000
Offset 0x048
Type R/W, reset 0x0000.0000
416
Bit/Field
31:3
RO
RO
2
1
0
31
15
0
0
RO
RO
Register 14: UART DMA Control (UARTDMACTL), offset 0x048
The UARTDMACTL register is the DMA control register.
30
14
0
0
RO
RO
DMAERR
RXDMAE
29
13
TXDMAE
reserved
0
0
Name
RO
RO
28
12
0
0
RO
RO
27
11
0
0
Type
R/W
R/W
R/W
RO
RO
RO
26
10
0
0
reserved
RO
RO
Reset
25
0x00
0
9
0
0
0
0
Preliminary
RO
RO
24
0
8
0
reserved
Description
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
DMA on Error
If this bit is set to 1, DMA receive requests are automatically disabled
when a receive error occurs.
Transmit DMA Enable
If this bit is set to 1, DMA for the transmit FIFO is enabled.
Receive DMA Enable
If this bit is set to 1, DMA for the receive FIFO is enabled.
RO
RO
23
0
7
0
RO
RO
22
0
6
0
RO
RO
21
0
5
0
RO
RO
20
0
4
0
RO
RO
19
0
3
0
DMAERR
R/W
RO
18
0
2
0
TXDMAE
R/W
RO
17
0
1
0
June 02, 2008
RXDMAE
R/W
RO
16
0
0
0

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