LM3S3768 Luminary Micro, Inc, LM3S3768 Datasheet - Page 32

• Manufacturer Part Number: LM3S3768
• Description: Lm3s3768 Arm Microcontroller
• Manufacturer: Luminary Micro, Inc

Architectural Overview
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QEI
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GPIOs
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Power
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Can initiate an ADC sample sequence
Hardware position integrator tracks the encoder position
Velocity capture using built-in timer
Interrupt generation on index pulse, velocity-timer expiration, direction change, and quadrature
error detection
1-61 GPIOs, depending on configuration
5-V-tolerant input/outputs
Programmable interrupt generation as either edge-triggered or level-sensitive
Low interrupt latency; as low as 6 cycles and never more than 12 cycles
Bit masking in both read and write operations through address lines
Can initiate an ADC sample sequence
Pins configured as digital inputs are Schmitt-triggered.
Programmable control for GPIO pad configuration:
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On-chip Low Drop-Out (LDO) voltage regulator, with programmable output user-adjustable
from 2.25 V to 2.75 V
Hibernation module handles the power-up/down 3.3 V sequencing and control for the core
digital logic and analog circuits
Low-power options on controller: Sleep and Deep-sleep modes
Optional fault handling for each PWM signal
Synchronization of timers in the PWM generator blocks
Synchronization of timer/comparator updates across the PWM generator blocks
Interrupt status summary of the PWM generator blocks
Weak pull-up or pull-down resistors
2-mA, 4-mA, and 8-mA pad drive for digital communication; up to four pads can be
configured with an 18-mA pad drive for high-current applications
Slew rate control for the 8-mA drive
Open drain enables
Digital input enables
Preliminary
June 02, 2008