LM3S3768 Luminary Micro, Inc, LM3S3768 Datasheet - Page 230

• Manufacturer Part Number: LM3S3768
• Description: Lm3s3768 Arm Microcontroller
• Manufacturer: Luminary Micro, Inc

Reset
Reset
Reset
Reset
Type
Type
Type
Type
Micro Direct Memory Access (μDMA)
DMAENASET Reads
DMA Channel Enable Set (DMAENASET)
Base 0x400F.F000
Offset 0x028
Type RO, reset 0x0000.0000
DMAENASET Writes
DMA Channel Enable Set (DMAENASET)
Base 0x400F.F000
Offset 0x028
Type WO, reset 0x0000.0000
230
Bit/Field
31:0
31
15
31
15
W
W
R
0
R
0
0
0
Register 14: DMA Channel Enable Set (DMAENASET), offset 0x028
Each bit of the DMAENASET register represents the corresponding DMA channel. Writing a 1
enables the DMA channel. Reading the register returns the enable status of the channels. If a
channel is enabled but the request mask is set (DMAREQMASKSET), then the channel can be
used for software-initiated transfers.
30
14
30
14
W
W
R
R
0
0
0
0
29
13
29
13
W
W
R
R
0
0
0
0
SET[n]
Name
28
12
28
12
W
W
R
R
0
0
0
0
27
11
27
W
11
W
R
R
0
0
0
0
Type
R
26
10
26
10
W
W
R
R
0
0
0
0
Reset
25
25
W
W
R
R
0x00
0
9
0
0
9
0
Preliminary
24
24
CHENSET[n]
CHENSET[n]
W
W
R
R
0
8
0
0
8
0
SET[n]
SET[n]
Description
Channel [n] Enable Set
Returns the enable status of the channels.
Value
0
1
23
23
W
W
R
R
0
7
0
0
7
0
Description
Disabled
Enabled
22
22
W
W
R
0
6
R
0
0
6
0
21
21
W
W
R
R
0
5
0
0
5
0
20
20
W
W
R
R
0
4
0
0
4
0
19
19
W
W
R
R
0
3
0
0
3
0
18
18
W
W
R
R
0
2
0
0
2
0
17
17
W
W
R
0
1
R
0
0
1
0
June 02, 2008
16
16
W
W
R
R
0
0
0
0
0
0