LM3S3768 Luminary Micro, Inc, LM3S3768 Datasheet - Page 545
LM3S3768
Manufacturer Part Number
LM3S3768
Description
Lm3s3768 Arm Microcontroller
Manufacturer
Luminary Micro, Inc
Datasheet
1.LM3S3768.pdf
(755 pages)
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Reset
Type
USB Transmit Hub Address Endpoint 0 (USBTXHUBADDR0)
Base 0x4005.0000
Offset 0x082
Type R/W, reset 0x00
June 02, 2008
Host
Bit/Field
MULTTRAN
6:0
R/W
7
7
0
R/W
Register 29: USB Transmit Hub Address Endpoint 0 (USBTXHUBADDR0),
offset 0x082
Register 30: USB Transmit Hub Address Endpoint 1 (USBTXHUBADDR1),
offset 0x08A
Register 31: USB Transmit Hub Address Endpoint 2 (USBTXHUBADDR2),
offset 0x092
Register 32: USB Transmit Hub Address Endpoint 3 (USBTXHUBADDR3),
offset 0x09A
USBTXHUBADDRn is an 8-bit read/write register that, like USBTXHUBPORTn, only needs to be
written when a full- or low-speed device is connected to transmit endpoint EPn via a high-speed
USB 2.0 hub. This register provides the necessary transaction translation to convert between
high-speed transmission and full-/low-speed transmission. This register records the address of that
USB 2.0 hub through which the target associated with the endpoint is accessed. This information,
together with the hub port in USBTXHUBPORTn, allows the USB controller to support split
transactions.
Note:
6
0
MULTTRAN
R/W
5
0
ADDR
Name
USBTXHUBADDR0 is used for both receive and transmit for endpoint 0.
R/W
4
0
ADDR
R/W
3
0
Type
R/W
R/W
R/W
2
0
R/W
Reset
0x00
1
0
0
Preliminary
R/W
0
0
Description
Multiple Translators
Indicates whether the hub has multiple transaction translators. Clear to
0 if single transaction translator; set to 1 if multiple transaction translators.
Hub Address
USB bus address for the USB 2.0 hub.
LM3S3768 Microcontroller
545
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