LM3S3768 Luminary Micro, Inc, LM3S3768 Datasheet - Page 533

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LM3S3768

Manufacturer Part Number
LM3S3768
Description
Lm3s3768 Arm Microcontroller
Manufacturer
Luminary Micro, Inc
Datasheet
June 02, 2008
Bit/Field
4:0
7
6
5
FORCEFS
FIFOACC
reserved
reserved
Name
R/W1S
Type
R/W
RO
RO
Reset
0x00
0
0
0
Preliminary
Description
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
FIFO Access
The CPU sets this bit to transfer the packet in the endpoint 0 transmit
FIFO to the endpoint 0 receive FIFO. It is cleared automatically.
Force Full Speed
The CPU sets this bit to force the USB controller into Full-Speed mode
when it receives a USB reset. When 0, the USB controller operates at
Low Speed.
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
LM3S3768 Microcontroller
533

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