MC9S12XEQ512CAL Freescale Semiconductor, MC9S12XEQ512CAL Datasheet - Page 1055

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MC9S12XEQ512CAL

Manufacturer Part Number
MC9S12XEQ512CAL
Description
MCU 16BIT 512K FLASH 112-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet

Specifications of MC9S12XEQ512CAL

Core Processor
HCS12X
Core Size
16-Bit
Speed
50MHz
Connectivity
CAN, EBI/EMI, I²C, IrDA, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
91
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.72 V ~ 5.5 V
Data Converters
A/D 16x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
112-LQFP
No. Of I/o's
91
Eeprom Memory Size
4KB
Ram Memory Size
32KB
Cpu Speed
50MHz
No. Of Timers
3
No. Of Pwm Channels
8
Digital Ic Case Style
LQFP
Rohs Compliant
Yes
Processor Series
S12XE
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
32 KB
Interface Type
CAN, SCI, SPI
Maximum Clock Frequency
50 MHz
Number Of Programmable I/os
91
Number Of Timers
25
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
KIT33812ECUEVME, EVB9S12XEP100, DEMO9S12XEP100
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 16 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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27.4.2.3
The Erase Verify P-Flash Section command will verify that a section of code in the P-Flash memory is
erased. The Erase Verify P-Flash Section command defines the starting point of the code to be verified and
the number of phrases. The section to be verified cannot cross a 256 Kbyte boundary in the P-Flash
memory space.
Upon clearing CCIF to launch the Erase Verify P-Flash Section command, the Memory Controller will
verify the selected section of Flash memory is erased. The CCIF flag will set after the Erase Verify P-Flash
Section operation has completed.
Freescale Semiconductor
FERSTAT
Register
Register
FSTAT
FSTAT
Erase Verify P-Flash Section Command
Table 27-37. Erase Verify P-Flash Section Command FCCOB Requirements
Table 27-38. Erase Verify P-Flash Section Command Error Handling
MGSTAT1
MGSTAT0
EPVIOLIF
MGSTAT1
MGSTAT0
ACCERR
ACCERR
Error Bit
Error Bit
FPVIOL
FPVIOL
Table 27-36. Erase Verify Block Command Error Handling
CCOBIX[2:0]
000
001
010
MC9S12XE-Family Reference Manual , Rev. 1.23
Set if CCOBIX[2:0] != 000 at command launch
Set if a Load Data Field command sequence is currently active
Set if an invalid global address [22:16] is supplied
None
Set if any errors have been encountered during the read
Set if any non-correctable errors have been encountered during the read
None
Set if CCOBIX[2:0] != 010 at command launch
Set if a Load Data Field command sequence is currently active
Set if command not available in current mode (see
Set if an invalid global address [22:0] is supplied
Set if a misaligned phrase address is supplied (global address [2:0] != 000)
Set if the requested section crosses a 256 Kbyte boundary
None
Set if any errors have been encountered during the read
Set if any non-correctable errors have been encountered during the read
Global address [15:0] of the first phrase to be verified
Number of phrases to be verified
0x03
FCCOB Parameters
Global address [22:16] of
Error Condition
Error Condition
Chapter 27 512 KByte Flash Module (S12XFTM512K3V1)
a P-Flash block
Table
27-30)
1055

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