MC9S12XEQ512CAL Freescale Semiconductor, MC9S12XEQ512CAL Datasheet - Page 206

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MC9S12XEQ512CAL

Manufacturer Part Number
MC9S12XEQ512CAL
Description
MCU 16BIT 512K FLASH 112-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet

Specifications of MC9S12XEQ512CAL

Core Processor
HCS12X
Core Size
16-Bit
Speed
50MHz
Connectivity
CAN, EBI/EMI, I²C, IrDA, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
91
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.72 V ~ 5.5 V
Data Converters
A/D 16x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
112-LQFP
No. Of I/o's
91
Eeprom Memory Size
4KB
Ram Memory Size
32KB
Cpu Speed
50MHz
No. Of Timers
3
No. Of Pwm Channels
8
Digital Ic Case Style
LQFP
Rohs Compliant
Yes
Processor Series
S12XE
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
32 KB
Interface Type
CAN, SCI, SPI
Maximum Clock Frequency
50 MHz
Number Of Programmable I/os
91
Number Of Timers
25
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
KIT33812ECUEVME, EVB9S12XEP100, DEMO9S12XEP100
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 16 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Chapter 3 Memory Mapping Control (S12XMMCV4)
The fixed 16K page from 0x4000–0x7FFF (when ROMHM = 0) is the page number 0xFD.
The reset value of 0xFE ensures that there is linear Flash space available between addresses 0x4000 and
0xFFFF out of reset.
The fixed 16K page from 0xC000-0xFFFF is the page number 0xFF.
3.3.2.7
Read: Anytime
Write: Anytime
These eight index bits are used to page 4 KByte blocks into the RAM page window located in the local
(CPU or BDM) memory map from address 0x1000 to address 0x1FFF (see
accessing up to 1022 KByte of RAM (in the Global map) within the 64 KByte Local map. The RAM page
index register is effectively used to construct paged RAM addresses in the Local map
206
Address: 0x0016
Because of an order from the United States International Trade Commission, BGA-packaged product lines and partnumbers
Reset
indicated here currently are not available from Freescale for import or sale in the United States prior to September 2010
W
R
RP7
RAM Page Index Register (RPAGE)
1
7
XGATE write access to this register during an CPU access which makes use
of this register could lead to unexpected results.
Because RAM page 0 has the same global address as the register space, it is
possible to write to registers through the RAM space when RPAGE = 0x00.
0
0
RP6
1
6
Figure 3-13. RAM Page Index Register (RPAGE)
0
MC9S12XE-Family Reference Manual , Rev. 1.23
Figure 3-14. RPAGE Address Mapping
Bit19
Global Address [22:0]
RP5
5
1
Bit18
RPAGE Register [7:0]
CAUTION
RP4
NOTE
1
4
Bit12
Address: CPU Local Address
RP3
1
3
Bit11
or BDM Local Address
Address [11:0]
RP2
2
1
Figure
3-14). This supports
Bit0
Freescale Semiconductor
RP1
format.
0
1
RP0
1
0

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