MC9S12XEQ512CAL Freescale Semiconductor, MC9S12XEQ512CAL Datasheet - Page 463

• Manufacturer Part Number: MC9S12XEQ512CAL
• Description: MCU 16BIT 512K FLASH 112-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of MC9S12XEQ512CAL

• Core Processor: HCS12X
• Core Size: 16-Bit
• Speed: 50MHz
• Connectivity: CAN, EBI/EMI, I²C, IrDA, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 91
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.72 V ~ 5.5 V
• Data Converters: A/D 16x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 112-LQFP
• No. Of I/o's: 91
• Eeprom Memory Size: 4KB
• Ram Memory Size: 32KB
• Cpu Speed: 50MHz
• No. Of Timers: 3
• No. Of Pwm Channels: 8
• Digital Ic Case Style: LQFP
• Rohs Compliant: Yes
• Processor Series: S12XE
• Core: HCS12
• Data Bus Width: 16 bit
• Data Ram Size: 32 KB
• Interface Type: CAN, SCI, SPI
• Maximum Clock Frequency: 50 MHz
• Number Of Programmable I/os: 91
• Number Of Timers: 25
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWHCS12
• Development Tools By Supplier: KIT33812ECUEVME, EVB9S12XEP100, DEMO9S12XEP100
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 16 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

10.8.6
Table 10-24
Freescale Semiconductor
Return to Scheduler and Others
Semaphore Instructions
Single Register Instructions
Special Move instructions
Shift instructions Dyadic
Shift instructions immediate
Logical Triadic
Arithmetic Triadic
Because of an order from the United States International Trade Commission, BGA-packaged product lines and partnumbers
indicated here currently are not available from Freescale for import or sale in the United States prior to September 2010
BRK
NOP
RTS
SIF
CSEM IMM3
CSEM RS
SSEM IMM3
SSEM RS
SEX RD
PAR RD
JAL RD
SIF RS
TFR RD,CCR
TFR CCR,RS
TFR RD,PC
BFFO RD, RS
ASR RD, RS
CSL RD, RS
CSR RD, RS
LSL RD, RS
LSR RD, RS
ROL RD, RS
ROR RD, RS
ASR RD, #IMM4
CSL RD, #IMM4
CSR RD, #IMM4
LSL RD, #IMM4
LSR RD, #IMM4
ROL RD, #IMM4
ROR RD, #IMM4
AND RD, RS1, RS2
OR RD, RS1, RS2
XNOR RD, RS1, RS2
SUB RD, RS1, RS2
SBC RD, RS1, RS2
ADD RD, RS1, RS2
ADC RD, RS1, RS2
Instruction Coding
summarizes all XGATE instructions in the order of their machine coding.
Functionality
Table 10-24. Instruction Set Summary (Sheet 1 of 3)
MC9S12XE-Family Reference Manual Rev. 1.23
15
0
0
0
0
0
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0
0
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0
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0
0
0
0
0
0
0
0
0
0
0
0
0
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0
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14
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
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0
0
0
0
0
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0
0
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0
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0
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13
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0
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0
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0
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12
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0
0
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0
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0
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0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
11
0
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0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
1
1
1
1
10
0
0
0
0
IMM3
IMM3
RD
RD
RD
RD
RD
RD
RD
RD
RD
RD
RD
RD
RD
RD
RD
RD
RD
RD
RD
RD
RD
RD
RD
RD
RD
RD
RD
RS
RS
RS
RS
9
0
0
1
1
For compare use SUB R0,Rs1,Rs2
8
0
1
0
1
7
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
RS1
RS1
RS1
RS1
RS1
RS1
RS1
RS
RS
RS
RS
RS
RS
RS
RS
6
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
IMM4
IMM4
IMM4
IMM4
IMM4
IMM4
IMM4
Chapter 10 XGATE (S12XGATEV3)
5
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
4
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
RS2
RS2
RS2
RS2
RS2
RS2
RS2
3
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
2
0
0
0
0
0
0
0
0
1
1
1
1
0
0
0
0
0
0
0
1
1
1
1
0
0
0
1
1
1
1
1
0
0
0
0
0
0
1
1
0
0
1
1
0
0
1
0
0
1
1
0
0
1
1
0
1
1
0
0
1
1
0
1
1
0
0
1
1
463
0
0
0
0
0
0
1
0
1
0
1
0
1
0
1
0
0
1
0
1
0
1
0
1
1
0
1
0
1
0
1
0
0
1
0
1
0
1