MC9S12XEQ512CAL Freescale Semiconductor, MC9S12XEQ512CAL Datasheet - Page 591

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MC9S12XEQ512CAL

Manufacturer Part Number
MC9S12XEQ512CAL
Description
MCU 16BIT 512K FLASH 112-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet

Specifications of MC9S12XEQ512CAL

Core Processor
HCS12X
Core Size
16-Bit
Speed
50MHz
Connectivity
CAN, EBI/EMI, I²C, IrDA, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
91
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.72 V ~ 5.5 V
Data Converters
A/D 16x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
112-LQFP
No. Of I/o's
91
Eeprom Memory Size
4KB
Ram Memory Size
32KB
Cpu Speed
50MHz
No. Of Timers
3
No. Of Pwm Channels
8
Digital Ic Case Style
LQFP
Rohs Compliant
Yes
Processor Series
S12XE
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
32 KB
Interface Type
CAN, SCI, SPI
Maximum Clock Frequency
50 MHz
Number Of Programmable I/os
91
Number Of Timers
25
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
KIT33812ECUEVME, EVB9S12XEP100, DEMO9S12XEP100
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 16 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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15.3.1.3
Read and write anytime
Freescale Semiconductor
Because of an order from the United States International Trade Commission, BGA-packaged product lines and partnumbers
Reset
indicated here currently are not available from Freescale for import or sale in the United States prior to September 2010
W
R
IBC[7:0]
Module Base + 0x0002
(hex)
AC
AD
AE
BA
BB
BC
BD
BE
AF
B0
B1
B2
B3
B4
B5
B6
B7
B8
B9
BF
IBEN
IIC Control Register (IBCR)
0
7
= Unimplemented or Reserved
IBIE
0
6
Table 15-7. IIC Divider and Hold Values (Sheet 6 of 6)
SCL Divider
(clocks)
Figure 15-6. IIC Bus Control Register (IBCR)
10240
12288
15360
2304
2560
3072
3840
2560
3072
3584
4096
4608
5120
6144
7680
5120
6144
7168
8192
9216
MC9S12XE-Family Reference Manual Rev. 1.23
MS/SL
5
0
Tx/Rx
0
4
SDA Hold
(clocks)
1028
1028
1028
1028
1540
1540
2052
2052
388
388
516
516
260
260
516
516
772
772
516
516
Chapter 15 Inter-Integrated Circuit (IICV3) Block Description
TXAK
0
3
SCL Hold
(start)
1144
1272
1528
1912
1272
1528
1784
2040
2296
2552
3064
3832
2552
3064
3576
4088
4600
5112
6136
7672
RSTA
2
0
0
0
0
1
SCL Hold
(stop)
1156
1284
1540
1924
1284
1540
1796
2052
2308
2564
3076
3844
2564
3076
3588
4100
4612
5124
6148
7684
IBSWAI
0
0
591

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