D13008VXI25V Renesas Electronics America, D13008VXI25V Datasheet - Page 105

• Manufacturer Part Number: D13008VXI25V
• Description: MCU 3V 0K I-TEMP PB-FREE 100-TQF
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Hr

Specifications of D13008VXI25V

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: SCI, SmartCard
• Peripherals: PWM, WDT
• Number Of I /o: 35
• Program Memory Type: ROMless
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

Bit 3—User Bit Enable (UE): Selects whether to use the UI bit in the condition code register as a
user bit or an interrupt mask bit.
Bit 3
UE
0
1
Bit 2—NMI Edge Select (NMIEG): Selects the valid edge of the NMI input.
Bit 2
NMIEG
0
1
Bit 1—Software Standby Output Port Enable (SSOE): Specifies whether the address bus and
bus control signals (CS
in the high-impedance state in software standby mode.
Bit 1
SSOE
0
1
Bit 0—RAM Enable (RAME): Enables or disables the on-chip RAM. The RAME bit is
initialized by the rising edge of the RES signal. It is not initialized in software standby mode.
Bit 0
RAME
0
1
Description
UI bit in CCR is used as an interrupt mask bit
UI bit in CCR is used as a user bit
Description
An interrupt is requested at the falling edge of NMI
An interrupt is requested at the rising edge of NMI
Description
In software standby mode, the address bus and bus control signals are all high-
impedance
signals are fixed high
Description
On-chip RAM is disabled
On-chip RAM is enabled
In software standby mode, the address bus retains its output state and bus control
0
to CS
7
, AS, RD, HWR, LWR) are kept as outputs or fixed high, or placed
Rev.4.00 Aug. 20, 2007 Page 59 of 638
3. MCU Operating Modes
REJ09B0395-0400
(Initial value)
(Initial value)
(Initial value)
(Initial value)