D13008VXI25V Renesas Electronics America, D13008VXI25V Datasheet - Page 12

MCU 3V 0K I-TEMP PB-FREE 100-TQF

D13008VXI25V

Manufacturer Part Number
D13008VXI25V
Description
MCU 3V 0K I-TEMP PB-FREE 100-TQF
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Datasheets

Specifications of D13008VXI25V

Core Processor
H8/300H
Core Size
16-Bit
Speed
25MHz
Connectivity
SCI, SmartCard
Peripherals
PWM, WDT
Number Of I /o
35
Program Memory Type
ROMless
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Rev.4.00 Aug. 20, 2007 page x of xliv
REJ09B0395-0400
Item
9.4.5 Operation with
Cascaded Connection
Compare Match Count
Mode
9.7.1 Contention
between 8TCNT Write
and Clear
Figure 9.18 Contention
between 8TCNT Write
and Clear
Page
267
272
Revision (See Manual for Details)
Figure amended
Description amended
Counter clear signal
Internal write signal
Channels 0 and 1:
When bits CKS2 to CKS0 are set to (100) in 8TCR1,
8TCNT1 counts channel 0 compare match A events.
Channels 0 and 1 are controlled independently.
CMF flag setting, interrupt generation, TMO pin output,
counter clearing, and so on, is in accordance with the
settings for each channel.
Note: When bit ICE = 1 in 8TCSR1, the compare match
Channels 2 and 3:
When bits CKS2 to CKS0 are set to (100) in 8TCR3,
8TCNT3 counts channel 2 compare match A events.
Channels 2 and 3 are controlled independently.
CMF flag setting, interrupt generation, TMO pin output,
counter clearing, and so on, is in accordance with the
settings for each channel.
Note: When bit ICE = 1 in 8TCSR3, the compare match
Address bus
8TCNT
register function of TCORB0 in channel 0 cannot be
used.
register function of TCORB2 in channel 2 cannot be
used.
φ
T
1
N
8TCNT write cycle
8TCNT address
T
2
T
3
H'00

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