D13008VXI25V Renesas Electronics America, D13008VXI25V Datasheet - Page 296

• Manufacturer Part Number: D13008VXI25V
• Description: MCU 3V 0K I-TEMP PB-FREE 100-TQF
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Hr

Specifications of D13008VXI25V

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: SCI, SmartCard
• Peripherals: PWM, WDT
• Number Of I /o: 35
• Program Memory Type: ROMless
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

9. 8-Bit Timers
9.2.3
Initial value
Read/Write
Initial value
Read/Write
TCORB0 to TCORB3 are 8-bit readable/writable registers. The TCORB0 and TCORB1 pair, and
the TCORB2 and TCORB3 pair, can each be accessed as a 16-bit register by word access.
The TCORB value is constantly compared with the 8TCNT value. When a match is detected, the
corresponding compare match flag B (CMFB) is set to 1 in 8TCSR*.
The timer output can be freely controlled by these compare match signals and the settings of
output/input capture edge select bits 3 and 2 (OIS3, OIS2) in 8TCSR.
When TCORB is used for input capture, it stores the 8TCNT value on detection of an external
input capture signal. At this time, the CMFB flag is set to 1 in the corresponding 8TCSR register.
The detected edge of the input capture signal is set in 8TCSR.
Each TCORB register is initialized to H'FF by a reset and in standby mode.
Note: * When channel 1 and channel 3 are designated for TCORB input capture, the CMFB
Rev.4.00 Aug. 20, 2007 Page 250 of 638
REJ09B0395-0400
Bit
Bit
Time Constant Registers B (TCORB)
flag is not set by a channel 0 or channel 2 compare match B.
R/W
R/W
15
15
1
1
R/W
R/W
14
14
1
1
R/W
R/W
13
13
1
1
R/W
R/W
TCORB0
TCORB2
12
12
1
1
R/W
R/W
11
11
1
1
R/W
R/W
10
10
1
1
R/W
R/W
9
1
9
1
R/W
R/W
8
1
8
1
R/W
R/W
7
1
7
1
R/W
R/W
6
1
6
1
R/W
R/W
5
1
5
1
R/W
R/W
TCORB1
TCORB3
4
1
4
1
R/W
R/W
3
1
3
1
R/W
R/W
2
1
2
1
R/W
R/W
1
1
1
1
R/W
R/W
0
1
0
1