D13008VXI25V Renesas Electronics America, D13008VXI25V Datasheet - Page 311

MCU 3V 0K I-TEMP PB-FREE 100-TQF

D13008VXI25V

Manufacturer Part Number
D13008VXI25V
Description
MCU 3V 0K I-TEMP PB-FREE 100-TQF
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Datasheets

Specifications of D13008VXI25V

Core Processor
H8/300H
Core Size
16-Bit
Speed
25MHz
Connectivity
SCI, SmartCard
Peripherals
PWM, WDT
Number Of I /o
35
Program Memory Type
ROMless
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
9. 8-Bit Timers
φ
8TCNT
N
TCORB
N
Input capture signal
CMFB
Figure 9.15 CMFB Flag Setting Timing when Input Capture Occurs
Timing of Overflow Flag (OVF) Setting: The OVF flag in 8TCSR is set to 1 by the overflow
signal generated when 8TCNT overflows (from H'FF to H'00). Figure 9.16 shows the timing in
this case.
φ
8TCNT
H'FF
H'00
Overflow signal
OVF
Figure 9.16 Timing of OVF Setting
9.4.5
Operation with Cascaded Connection
If bits CKS2 to CKS0 are set to (100) in either 8TCR0 or 8TCR1, the 8-bit timers of channels 0
and 1 are cascaded. With this configuration, the two timers can be used as a single 16-bit timer
(16-bit timer mode), or channel 0 8-bit timer compare matches can be counted in channel 1
(compare match count mode). Similarly, if bits CKS2 to CKS0 are set to (100) in either 8TCR2 or
8TCR3, the 8-bit timers of channels 2 and 3 are cascaded. With this configuration, the two timers
can be used as a single 16-bit timer (16-bit timer mode),or channel 2 8-bit timer compare matches
can be counted in channel 3 (compare match count mode). In this case, the timer operates as
below.
Rev.4.00 Aug. 20, 2007 Page 265 of 638
REJ09B0395-0400

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