D13008VXI25V Renesas Electronics America, D13008VXI25V Datasheet - Page 35

MCU 3V 0K I-TEMP PB-FREE 100-TQF

D13008VXI25V

Manufacturer Part Number
D13008VXI25V
Description
MCU 3V 0K I-TEMP PB-FREE 100-TQF
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Datasheets

Specifications of D13008VXI25V

Core Processor
H8/300H
Core Size
16-Bit
Speed
25MHz
Connectivity
SCI, SmartCard
Peripherals
PWM, WDT
Number Of I /o
35
Program Memory Type
ROMless
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Figure 9.23
Figure 9.24
Section 10 Programmable Timing Pattern Controller (TPC)
Figure 10.1
Figure 10.2
Figure 10.3
Figure 10.4
Figure 10.5
Figure 10.6
Figure 10.7
Figure 10.8
Figure 10.9
Figure 10.10
Section 11 Watchdog Timer
Figure 11.1
Figure 11.2
Figure 11.3
Figure 11.4
Figure 11.5
Figure 11.6
Figure 11.7
Figure 11.8
Section 12 Serial Communication Interface
Figure 12.1
Figure 12.2
Figure 12.3
Figure 12.4
Figure 12.5
Figure 12.6
Figure 12.7
Figure 12.8
Contention between TCOR Write and Input Capture......................................... 277
Contention between 8TCNT Byte Write and Increment in 16-Bit Count
Mode................................................................................................................... 278
TPC Block Diagram ........................................................................................... 284
TPC Output Operation........................................................................................ 300
Timing of Transfer of Next Data Register Contents and Output (Example) ...... 301
Setup Procedure for Normal TPC Output (Example)......................................... 302
Normal TPC Output Example (Five-Phase Pulse Output) ................................. 303
Setup Procedure for Non-Overlapping TPC Output (Example) ......................... 304
Non-Overlapping TPC Output Example
(Four-Phase Complementary Non-Overlapping Pulse Output) ......................... 305
TPC Output Triggering by Input Capture (Example)......................................... 306
Non-Overlapping TPC Output............................................................................ 307
Non-Overlapping Operation and NDR Write Timing ........................................ 308
WDT Block Diagram ......................................................................................... 310
Format of Data Written to TCNT and TCSR ..................................................... 315
Format of Data Written to RSTCSR................................................................... 316
Operation in Watchdog Timer Mode.................................................................. 317
Interval Timer Operation.................................................................................... 318
Timing of Setting of OVF .................................................................................. 318
Timing of Setting of WRST Bit and Internal Reset............................................ 319
Contention between TCNT Write and Count up ................................................ 320
SCI Block Diagram ............................................................................................ 323
Data Format in Asynchronous Communication
(Example: 8-Bit Data with Parity and 2 Stop Bits) ............................................ 353
Phase Relationship between Output Clock and Serial Data
(Asynchronous Mode) ........................................................................................ 355
Sample Flowchart for SCI Initialization............................................................. 356
Sample Flowchart for Transmitting Serial Data ................................................. 357
Example of SCI Transmit Operation in Asynchronous Mode
(8-Bit Data with Parity and One Stop Bit).......................................................... 358
Sample Flowchart for Receiving Serial Data ..................................................... 359
Example of SCI Receive Operation
(8-Bit Data with Parity and One Stop Bit).......................................................... 362
Rev.4.00 Aug. 20, 2007, Page xxxiii of xliv
REJ09B0395-0400

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