D13008VXI25V Renesas Electronics America, D13008VXI25V Datasheet - Page 500

MCU 3V 0K I-TEMP PB-FREE 100-TQF

D13008VXI25V

Manufacturer Part Number
D13008VXI25V
Description
MCU 3V 0K I-TEMP PB-FREE 100-TQF
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Datasheets

Specifications of D13008VXI25V

Core Processor
H8/300H
Core Size
16-Bit
Speed
25MHz
Connectivity
SCI, SmartCard
Peripherals
PWM, WDT
Number Of I /o
35
Program Memory Type
ROMless
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
17. Clock Pulse Generator
17.3
When the oscillator frequency is 5 MHz or higher, the duty adjustment circuit adjusts the duty
cycle of the clock signal from the oscillator to generate φ.
17.4
The prescalers divide the system clock (φ) to generate internal clocks (φ/2 to φ/4096).
17.5
The frequency divider divides the duty-adjusted clock signal to generate the system clock (φ). The
frequency division ratio can be changed dynamically by modifying the value in DIVCR, as
described below. Power consumption in the chip is reduced in almost direct proportion to the
frequency division ratio. The system clock generated by the frequency divider can be output at the
φ pin.
17.5.1
Table 17.4 summarizes the frequency division register.
Table 17.4 Frequency Division Register
Address*
H'EE01B
Note:
Rev.4.00 Aug. 20, 2007 Page 454 of 638
REJ09B0395-0400
* Lower 20 bits of the address in advanced mode.
Duty Adjustment Circuit
Prescalers
Frequency Divider
Register Configuration
Name
Division control register
Abbreviation
DIVCR
R/W
R/W
Initial Value
H'FC

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