EP3C16F256I7N Altera, EP3C16F256I7N Datasheet - Page 262
EP3C16F256I7N
Manufacturer Part Number
EP3C16F256I7N
Description
Cyclone III
Manufacturer
Altera
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Configuring Cyclone III Devices
10–26
Cyclone III Device Handbook, Volume 1
You can either leave the nCEO output pins on all the Cyclone III devices
unconnected or use the nCEO output pins as normal user I/O pins. The
DATA and DCLK pins are connected in parallel to all the Cyclone III
devices.
You should put a buffer before the DATA and DCLK output from the
master Cyclone III device to avoid signal strength and signal integrity
issues. The buffer should not significantly change the DATA-to-DCLK
relationships or delay them with respect to other AS signals (ASDI and
nCS). Also, the buffer should only drive the slave Cyclone III devices, so
that the timing between the master Cyclone III device and serial
configuration device is unaffected.
This configuration method supports both compressed and uncompressed
SRAM Object Files. Therefore, if the configuration bitstream size exceeds
the capacity of a serial configuration device, you can enable the
compression feature in the SRAM Object File used or you can select a
larger serial configuration device.
Estimating AS Configuration Time
Active serial configuration time is dominated by the time it takes to
transfer data from the serial configuration device to the Cyclone III
device. This serial interface is clocked by the Cyclone III DCLK output
(generated from an internal oscillator). As listed in
page
oscillator is 20MHz (50 ns). Therefore, the maximum configuration time
estimate for an EP3C10 device (3,500,000 bits of uncompressed data) is:
RBF Size × (maximum DCLK period / 1 bit per DCLK cycle) = estimated
maximum configuration time
3,500,000 bits × (50 ns / 1 bit) = 175 ms
To estimate the typical configuration time, use the typical DCLK period as
listed in
configuration time is 116.7 ms. Enabling compression reduces the amount
of configuration data that is transmitted to the Cyclone III device, which
also reduces configuration time. On average, compression reduces
configuration time by 50%.
Programming Serial Configuration Devices
Serial configuration devices are non-volatile, flash-memory-based
devices. You can program these devices in-system using the
USB-Blaster
10–17, the DCLK minimum frequency when using the 40-MHz
Figure
™
or ByteBlaster II
10–7. With a typical DCLK period of 33.33 ns, the typical
™
download cable. Alternatively, you can
Altera Corporation-Preliminary
Table 10–7 on
March 2007
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