EP3C16F256I7N Altera, EP3C16F256I7N Datasheet - Page 577

• Manufacturer Part Number: EP3C16F256I7N
• Description: Cyclone III
• Manufacturer: Altera

Cyclone III Device Datasheet: DC & Switching Characteristics
Glossary
Altera Corporation-Preliminary
March 2007
Letter
Table 1–104. Glossary
G
M
A
B
C
D
E
H
K
F
J
L
I
f
GCLK
GCLK PLL
HSIODR
Input Waveforms for
the SSTL Differential
I/O Standard
JTAG Waveform
H S C L K
Term
—
—
—
—
—
—
—
—
Table 1–104
HIGH-SPEED I/O Block: High-speed receiver/transmitter input and output clock
frequency.
Input pin directly to Global Clock network.
Input pin to Global Clock network through PLL.
HIGH-SPEED I/O Block: Maximum/minimum LVDS data transfer rate (HSIODR =
1/TUI).
V
Captured
SWING
Driven
Signal
Signal
to be
to be
TMS
TDO
TCK
TDI
shows the glossary for this chapter.
t
JCH
t
t
JSZX
JPZX
t
JCP
t
JSSU
t
JCL
t
JSH
Definitions
t
t
JPCO
JSCO
t
t
—
—
—
—
—
—
—
—
JPSU_TDI
JPSU_TMS
t
t
JSXZ
JPH
Cyclone III Handbook
t
JPXZ
V
V
1–167
V
IH
REF
IL