EP3C16F256I7N Altera, EP3C16F256I7N Datasheet - Page 377

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EP3C16F256I7N

Manufacturer Part Number
EP3C16F256I7N
Description
Cyclone III
Manufacturer
Altera
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Figure 14–2. IEEE Std. 1149.1 Circuitry
Notes to
(1)
Altera Corporation-Preliminary
March 2007
TCLK
TMS
TDI
For register lengths, see the device data sheet in the Configuring Cyclone III Devices chapter of the Cyclone III
Device Handbook.
Figure
Controller
14–2:
TAP
UPDATEDR
UPDATEIR
CLOCKDR
CLOCKIR
SHIFTDR
SHIFTIR
The IEEE Std. 1149.1 BST circuitry requires the following registers:
Figure 14–2
The instruction register determines the action to be performed and
the data register to be accessed.
The bypass register is a 1-bit-long data register that provides a
minimum-length serial path between TDI and TDO.
The boundary-scan register is a shift register composed of all the
boundary-scan cells of the device.
Data Registers
Instruction Register
shows a functional model of the IEEE Std. 1149.1 circuitry.
Bypass Register
Boundary-Scan Register
Device ID Register
ICR Registers
Instruction Decode
(1)
(1)
Cyclone III Device Handbook, Volume 1
IEEE Std. 1149.1 BST Architecture
14–3
TDO

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