EP3C16F256I7N Altera, EP3C16F256I7N Datasheet - Page 83

• Manufacturer Part Number: EP3C16F256I7N
• Description: Cyclone III
• Manufacturer: Altera

Figure 4–22. Cyclone III Read-During-Write Data Flow
Altera Corporation-Preliminary
March 2007
write_a
read_a
Port A
data in
Port A
data out
Figure 4–22
Same-Port Read-During-Write Mode
This mode applies to a single-port RAM or the same port of a true
dual-port RAM. In the same port read-during-write mode, there are two
output choices: “New Data” mode (or flow-through) and “Old Data”
mode. In the “New Data” mode, new data is available on the rising edge
of the same clock cycle on which it was written. In “Old Data” mode, the
RAM outputs reflect the old data at that address before the write
operation proceeds.
When using New Data mode together with byte enable (byteena), you
can control the output of the RAM. When byte enable is high, the data
written into the memory passes to the output (flow-through). When byte
enable is low, the masked-off data is not written into the memory and the
old data in the memory appears on the outputs. Therefore, the output can
be a combination of new and old data determined by byte enable.
Figures 4–23
read-during-write behavior with both “New Data” and “Old Data”
modes, respectively.
shows the difference between these flows.
and
4–24
show sample functional waveforms of same port
Cyclone III Device Handbook, Volume 1
Port B
data in
Port B
data out
read_b
write_b
Design Considerations
Mixed-port
data flow
Same-port
data flow
4–29