EP3C16F256I7N Altera, EP3C16F256I7N Datasheet - Page 540

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EP3C16F256I7N

Manufacturer Part Number
EP3C16F256I7N
Description
Cyclone III
Manufacturer
Altera
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Typical Design Performance
1–130
Cyclone III Handbook
PPDS
RSDS
3.3-V LVTTL
3.3-V LVCMOS
3.0-V LVTTL
3.0-V LVCMOS
Table 1–77. EP3C55 Row Pin Differential I/O Timing Parameters (Part 2 of 2)
Table 1–78. EP3C80 Column I/O Pin Input Timing Parameters for Single-Ended I/O Standards (Part 1 of 4)
I/O Standard
I/O Standard
Current Strength
GCLK
GCLK PLL
GCLK
GCLK PLL
GCLK
GCLK PLL
GCLK
GCLK PLL
Clock
EP3C80 I/O Timing Parameters
Table 1–78
parameters for EP3C80 devices.
GCLK
GCLK PLL
GCLK
GCLK PLL
through
Parameter
Clock
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
SU
SU
SU
SU
SU
SU
SU
SU
H
H
H
H
H
H
H
H
Table 1–83
Parameter
-0.426
-3.559
-0.426
-3.559
-0.426
-3.559
-0.426
-3.559
0.626
3.759
0.626
3.759
0.626
3.759
0.626
3.759
t
t
t
t
CO
CO
CO
CO
-6
show the maximum I/O timing
Specification
4.252
1.211
4.252
1.211
-0.464
-3.916
-0.464
-3.916
-0.464
-3.916
-0.464
-3.916
0.695
4.147
0.695
4.147
0.695
4.147
0.695
4.147
-6
-7
Altera Corporation- Preliminary
Specification
4.667
1.318
4.667
1.318
-7
-0.406
-4.195
-0.406
-4.195
-0.406
-4.195
-0.406
-4.195
0.669
4.458
0.669
4.458
0.669
4.458
0.669
4.458
-8
5.107
1.443
5.107
1.443
-8
March 2007
Units
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