EP3C16F256I7N Altera, EP3C16F256I7N Datasheet - Page 275
EP3C16F256I7N
Manufacturer Part Number
EP3C16F256I7N
Description
Cyclone III
Manufacturer
Altera
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Figure 10–10. Byte-Wide Multi-Device AP Configuration
Notes to
(1)
(2)
(3)
(4)
(5)
(6)
Altera Corporation-Preliminary
March 2007
From Switch/Button or Other Master Controller
Spansion S29WS-N Flash
Connect the pull-up resistors to V
Connect the pull-up resistor to the V
The nCEO pin can be left unconnected or used as a user I/O pin when it does not feed another device’s nCE pin.
The MSEL pin settings vary for different configuration voltage standards and POR time. You must set the
Cyclone III master device in AP mode and the slave devices in FPP mode. To connect MSEL[3..0] for the master
device in AP mode, refer to
refer to
The current implementation for AP configuration ignores the RDY pin. However it is recommended that you connect
this pin.
Connect the repeater buffers between the Cyclone III master and slave device(s) for DATA[15..0] and DCLK. All
I/O inputs must maintain a maximum AC voltage of 4.1V. The output resistance of the repeater buffers has to fit the
maximum overshoot equation outlined in
Intel P30 Flash/
Figure
RST#/RESET#
A[24:1]/A[23:0]
ADV#/AVD#
Table 10–12 on page
WAIT/RDY
DQ[15:0]
10–10:
WE#
OE#
CLK
CE#
GND
Byte-Wide Multi-Device AP Configuration
The first method is the byte-wide multi-device AP configuration and is
the simpler form. In the byte-wide multi-device AP configuration, the
least significant byte DATA[7..0] from the flash and master device set
to AP configuration scheme is connected to each of the slave devices set
to FPP configuration scheme, as shown in
Table 10–8 on page
10–61. Connect the MSEL pins directly to V
Buffers (6)
nCE
DCLK
nRESET
FLASH_nCE
nOE
nAVD
nWE
RDY (5)
DATA[15..0]
PADD[23..0]
Cyclone III Master Device
CCIO
10k
V
CCIO
CCIO
supply of the bank the pin resides in.
(1)
MSEL[3..0]
supply voltage of I/O bank that the nCEO pin resides in.
10k
“Configuration and JTAG Pin I/O Requirements” on page
V
nCEO
CCIO
10–30. To connect MSEL[3..0] for the slave devices in FPP mode,
Active Parallel Configuration (Supported Flash Memories)
10k
(1)
V
DQ[7..0]
CCIO
(4)
(2)
nCE
DATA[7..0]
DCLK
Cyclone III Slave Device
MSEL[3..0]
Cyclone III Device Handbook, Volume 1
CCIO
nCEO
10k
or GND.
V
DQ[7..0]
CCIO
Figure
(4)
(2)
nCE
DATA[7..0]
DCLK
Cyclone III Slave Device
10–10.
MSEL[3..0]
nCEO
10–13.
10–39
(4)
N.C. (3)
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