EP3C16F256I7N Altera, EP3C16F256I7N Datasheet - Page 284

• Manufacturer Part Number: EP3C16F256I7N
• Description: Cyclone III
• Manufacturer: Altera

Configuring Cyclone III Devices
10–48
Cyclone III Device Handbook, Volume 1
The three stages of the configuration cycle are reset, configuration, and
initialization. While nCONFIG or nSTATUS are low, the device is in reset.
To initiate configuration, the MAX II device must generate a low-to-high
transition on the nCONFIG pin.
1
When nCONFIG goes high, the device comes out of reset and releases the
open-drain nSTATUS pin, which is then pulled high by an external 10 KΩ
pull-up resistor. Once nSTATUS is released, the device is ready to receive
configuration data and the configuration stage begins. When nSTATUS is
pulled high, the MAX II device should place the configuration data one
bit at a time on the DATA[0] pin. If you are using configuration data in
either a RBF, TTF, or HEX file, you must send the least significant bit (LSB)
of each data byte first. For example, if the RBF contains the byte sequence
02 1B EE 01 FA, the serial bitstream you should transmit to the device
is:
0100-0000 1101-1000 0111-0111 1000-0000 0101-1111.
The Cyclone III devices receive configuration data on the DATA[0] pin
and the clock is received on the DCLK pin. Data is latched into the device
on the rising edge of DCLK. Data is continuously clocked into the target
device until CONF_DONE goes high. After the device has received all
configuration data successfully, it releases the open-drain CONF_DONE
pin, which is pulled high by an external 10 KΩ pull-up resistor. A
low-to-high transition on CONF_DONE indicates configuration is complete
and initialization of the device can begin. The CONF_DONE pin must have
an external 10 KΩ pull-up resistor in order for the device to initialize.
In Cyclone III devices, the initialization clock source is either the internal
oscillator (typically 10MHz) or the optional CLKUSR pin. By default, the
internal oscillator is the clock source for initialization. If the internal
oscillator is used, the Cyclone III device provides itself with enough clock
cycles for proper initialization. Therefore, if the internal oscillator is the
initialization clock source, sending the entire configuration file to the
device is sufficient to configure and initialize the device. Driving DCLK to
the device after configuration is complete does not affect device
operation. Additionally, if you use the internal oscillator as the clock
source, you can use the CLKUSR pin as a user I/O pin.
You also have the flexibility to synchronize initialization of multiple
devices or to delay initialization with the CLKUSR option. The Enable
user-supplied start-up clock (CLKUSR) option can be turned on in the
Quartus II software from the General tab of the Device & Pin Options
To begin configuration, power the V
the banks where the configuration and JTAG pins reside)
voltages to the appropriate voltage levels.
Altera Corporation-Preliminary
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CCA
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March 2007
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