EP2AGX45DF29I5 Altera, EP2AGX45DF29I5 Datasheet - Page 15
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EP2AGX45DF29I5
Manufacturer Part Number
EP2AGX45DF29I5
Description
IC ARRIA II GX FPGA 45K 780FBGA
Manufacturer
Altera
Series
Arria II GXr
Datasheets
1.EP2AGX45CU17C6N.pdf
(96 pages)
2.EP2AGX45CU17C6N.pdf
(14 pages)
3.EP2AGX45CU17C6N.pdf
(692 pages)
4.EP2AGX45CU17C6N.pdf
(10 pages)
5.EP2AGX45CU17C6N.pdf
(88 pages)
Specifications of EP2AGX45DF29I5
Number Of Logic Elements/cells
42959
Number Of Labs/clbs
1805
Total Ram Bits
3435
Number Of I /o
364
Voltage - Supply
0.87 V ~ 0.93 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
780-FBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Gates
-
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and/or trademarks of Altera Corporation in the U.S. and other countries. All other trademarks and service marks are the property of their respective holders as described at
www.altera.com/common/legal.html. Altera warrants performance of its semiconductor products to current specifications in accordance with Altera’s standard warranty, but
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AIIGX51001-4.0
Arria II Device Feature
Arria II Device Handbook Volume 1: Device Interfaces and Integration
December 2010
December 2010
AIIGX51001-4.0
The Arria
cost-optimized, 40-nm device family architecture features a low-power,
programmable logic engine and streamlined transceivers and I/Os. Common
interfaces, such as the Physical Interface for PCI Express
and DDR3 memory are easily implemented in your design with the Quartus
software, the SOPC Builder design software, and a broad library of hard and soft
intellectual property (IP) solutions from Altera
designing for applications requiring transceivers operating at up to 6.375 Gbps fast
and easy.
This chapter contains the following sections:
■
■
■
The Arria II device features consist of the following highlights:
■
■
“Arria II Device Feature” on page 1–1
“Arria II Device Architecture” on page 1–6
“Reference and Ordering Information” on page 1–14
40-nm, low-power FPGA engine
■
■
■
High-performance digital signal processing (DSP) blocks up to 550 MHz
■
■
■
Adaptive logic module (ALM) offers the highest logic efficiency in the industry
Eight-input fracturable look-up table (LUT)
Memory logic array blocks (MLABs) for efficient implementation of small
FIFOs
Configurable as 9 × 9-bit, 12 × 12-bit, 18 × 18-bit, and 36 × 36-bit full-precision
multipliers as well as 18 × 36-bit high-precision multiplier
Hardcoded adders, subtractors, accumulators, and summation functions
Fully-integrated design flow with the MATLAB and DSP Builder software
from Altera
®
II device family is designed specifically for ease-of-use. The
1. Overview for the Arria II Device Family
®
. The Arria II device family makes
®
(PIPE) (PCIe
®
), Ethernet,
®
II
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