EP2AGX45DF29I5 Altera, EP2AGX45DF29I5 Datasheet - Page 178
![no-image](/images/manufacturer_photos/0/0/40/altera_sml.jpg)
EP2AGX45DF29I5
Manufacturer Part Number
EP2AGX45DF29I5
Description
IC ARRIA II GX FPGA 45K 780FBGA
Manufacturer
Altera
Series
Arria II GXr
Datasheets
1.EP2AGX45CU17C6N.pdf
(96 pages)
2.EP2AGX45CU17C6N.pdf
(14 pages)
3.EP2AGX45CU17C6N.pdf
(692 pages)
4.EP2AGX45CU17C6N.pdf
(10 pages)
5.EP2AGX45CU17C6N.pdf
(88 pages)
Specifications of EP2AGX45DF29I5
Number Of Logic Elements/cells
42959
Number Of Labs/clbs
1805
Total Ram Bits
3435
Number Of I /o
364
Voltage - Supply
0.87 V ~ 0.93 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
780-FBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Gates
-
Available stocks
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- EP2AGX45CU17C6N PDF datasheet
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6–20
Arria II Device Handbook Volume 1: Device Interfaces and Integration
The R
typical R
Figure 6–5. R
To use OCT for:
■
■
R
Arria II devices support R
circuit compares the total impedance of the I/O buffer to the external
25-Ω ±1% or 50-Ω ±1% resistors connected to the RUP and RDN pins, and dynamically
enables or disables the transistors until they match.
The R
occurs at the end of device configuration. When the calibration circuit finds the
correct impedance, it powers down and stops changing the characteristics of the
drivers.
Figure 6–6. R
S
OCT with Calibration for Arria II Devices
SSTL Class I standard—select the 50-Ω on-chip series termination setting, thus
eliminating the external 25-Ω R
SSTL Class II standard—select the 25-Ω on-chip series termination setting (to
match the 50-Ω transmission line and the near-end external 50-Ω pull-up to V
S
S
shown in
shown in
S
values are 25 Ω and 50 Ω.
S
S
OCT without Calibration for Arria II Devices
OCT with Calibration for Arria II Devices
Figure 6–5
Series Termination
Figure 6–6
Series Termination
Arria II GX Driver
Arria II Driver
S
V
V
GND
GND
OCT with calibration in all banks. The R
CCIO
CCIO
is the intrinsic impedance of output transistors. The
is the intrinsic impedance of transistors. Calibration
R
R
R
R
S
S
S
S
S
(to match the 50-Ω transmission line).
Z
Z
O
O
= 50
= 50
Chapter 6: I/O Features in Arria II Devices
Receiving
Receiving
Device
Device
December 2010 Altera Corporation
S
OCT calibration
OCT Support
TT
).
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