EP2AGX45DF29I5 Altera, EP2AGX45DF29I5 Datasheet - Page 19
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EP2AGX45DF29I5
Manufacturer Part Number
EP2AGX45DF29I5
Description
IC ARRIA II GX FPGA 45K 780FBGA
Manufacturer
Altera
Series
Arria II GXr
Datasheets
1.EP2AGX45CU17C6N.pdf
(96 pages)
2.EP2AGX45CU17C6N.pdf
(14 pages)
3.EP2AGX45CU17C6N.pdf
(692 pages)
4.EP2AGX45CU17C6N.pdf
(10 pages)
5.EP2AGX45CU17C6N.pdf
(88 pages)
Specifications of EP2AGX45DF29I5
Number Of Logic Elements/cells
42959
Number Of Labs/clbs
1805
Total Ram Bits
3435
Number Of I /o
364
Voltage - Supply
0.87 V ~ 0.93 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
780-FBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Gates
-
Available stocks
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Part Number:
EP2AGX45DF29I5N
Manufacturer:
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EP2AGX45DF29I5N
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Chapter 1: Overview for the Arria II Device Family
Arria II Device Feature
Table 1–3. Package Options and I/O Information for Arria II GZ Devices
Table 1–4. Speed Grades for Arria II Devices
December 2010 Altera Corporation
EP2AGZ225
EP2AGZ300
EP2AGZ350
Notes to
(1) The user I/O counts include clock pins.
(2) RX = True LVDS input buffers without R
(3) eTX = Emulated-LVDS output buffers, either LVDS_E_3R or LVDS_E_1R.
(4) The LVDS RX and TX channels are equally divided between the left and right sides of the device.
(5) The LVDS channel count does not include dedicated clock input pins.
(6) For Arria II GZ 780-pin FBGA package, the LVDS channels are only supported in column I/O banks.
(7) These numbers represents the accumulated LVDS channels supported in Arria II GZ device row and column I/O banks.
EP2AGX45
EP2AGX65
EP2AGX95
EP2AGX125
EP2AGX190
EP2AGX260
EP2AGZ225
EP2AGZ300
EP2AGZ350
Device
banks.
Device
Table
1–3:
281
281
I/O
—
358-Pin Flip Chip
C4, C5, C6, I5
C4, C5, C6, I5
780-Pin Flip Chip FBGA
Arria II devices are available in up to four speed grades: –3 (fastest), –4, –5, and –6
(slowest).
UBGA
68 (RX or eTX) +
68 (RX or eTX) +
29 mm × 29 mm
—
—
—
—
—
—
—
LVDS
72 eTX
72 eTX
—
Table 1–4
(6)
D
OCT support for row I/O banks, or true LVDS input buffers without R
572-Pin Flip Chip
C4, C5, C6, I3, I5
C4, C5, C6, I3, I5
C4, C5, C6, I3, I5
C4, C5, C6, I3, I5
lists the speed grades for Arria II devices.
—
16
16
FBGA
—
—
—
—
—
554
554
554
I/O
1152-Pin Flip Chip FBGA
135 (RX or eTX) +
135 (RX or eTX) +
135 (RX or eTX) +
35 mm × 35 mm
140 (TX or eTX)
140 (TX or eTX)
140 (TX or eTX)
780-Pin Flip Chip
C4, C5, C6, I3, I5
C4, C5, C6, I3, I5
C4, C5, C6, I3, I5
C4, C5, C6, I3, I5
C4, C5, C6, I3, I5
C4, C5, C6, I3, I5
Arria II Device Handbook Volume 1: Device Interfaces and Integration
LVDS
C3, C4, I3, I4
C3, C4, I3, I4
FBGA
(7)
—
(Note
1), (2), (3), (4),
16
16
16
1152-Pin Flip Chip
C4, C5, C6, I3, I5
C4, C5, C6, I3, I5
C4, C5, C6, I3, I5
C4, C5, C6, I3, I5
734
734
734
I/O
C3, C4, I3, I4
C3, C4, I3, I4
C3, C4, I3, I4
1517-Pin Flip Chip FBGA
FBGA
—
—
D
179 (RX or eTX) +
179 (RX or eTX) +
179 (RX or eTX) +
OCT support for column I/O
40 mm × 40 mm
184 (TX or eTX)
184 (TX or eTX)
184 (TX or eTX)
(5)
LVDS
(7)
1517-Pin Flip Chip
C3, C4, I3, I4
C3, C4, I3, I4
C3, C4, I3, I4
FBGA
—
—
—
—
—
—
24
24
24
1–5
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