EP2AGX45DF29I5 Altera, EP2AGX45DF29I5 Datasheet - Page 97
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EP2AGX45DF29I5
Manufacturer Part Number
EP2AGX45DF29I5
Description
IC ARRIA II GX FPGA 45K 780FBGA
Manufacturer
Altera
Series
Arria II GXr
Datasheets
1.EP2AGX45CU17C6N.pdf
(96 pages)
2.EP2AGX45CU17C6N.pdf
(14 pages)
3.EP2AGX45CU17C6N.pdf
(692 pages)
4.EP2AGX45CU17C6N.pdf
(10 pages)
5.EP2AGX45CU17C6N.pdf
(88 pages)
Specifications of EP2AGX45DF29I5
Number Of Logic Elements/cells
42959
Number Of Labs/clbs
1805
Total Ram Bits
3435
Number Of I /o
364
Voltage - Supply
0.87 V ~ 0.93 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
780-FBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Gates
-
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Chapter 4: DSP Blocks in Arria II Devices
Arria II Operational Mode Descriptions
Figure 4–18. Multiply Accumulate Mode Shown for Half-DSP Block
Note to
(1) Block output for saturation overflow of chainout.
December 2010 Altera Corporation
Figure
Multiply Accumulate Mode
accum_sload
4–18:
dataa_0[ ]
datab_0[ ]
dataa_1[ ]
datab_1[ ]
dataa_2[ ]
datab_2[ ]
dataa_3[ ]
datab_3[ ]
In multiply accumulate mode, the second-stage adder is configured as a 44-bit
accumulator or subtractor. The output of the DSP block is looped back to the
second-stage adder and added or subtracted with the two outputs of the first-stage
adder block according to
Figure 4–18
A single DSP block can implement up to two independent 44-bit accumulators.
Use the dynamic accum_sload control signal to clear the accumulation. A logic 1
value on the accum_sload signal synchronously loads the accumulator with the
multiplier result only, and a logic 0 enables accumulation by adding or subtracting
the output of the DSP block (accumulator feedback) to the output of the multiplier
and first-stage adder.
Half-DSP Block
clock[3..0]
ena[3..0]
aclr[3..0]
shows the DSP block configured to operate in multiply accumulate mode.
output_saturate
+
+
output_round
Equation 4–3 on page
signa
signb
+
Arria II Device Handbook Volume 1: Device Interfaces and Integration
4–5.
chainout_sat_overflow (1)
44
result[ ]
4–25
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