EP2AGX45DF29I5 Altera, EP2AGX45DF29I5 Datasheet - Page 37
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EP2AGX45DF29I5
Manufacturer Part Number
EP2AGX45DF29I5
Description
IC ARRIA II GX FPGA 45K 780FBGA
Manufacturer
Altera
Series
Arria II GXr
Datasheets
1.EP2AGX45CU17C6N.pdf
(96 pages)
2.EP2AGX45CU17C6N.pdf
(14 pages)
3.EP2AGX45CU17C6N.pdf
(692 pages)
4.EP2AGX45CU17C6N.pdf
(10 pages)
5.EP2AGX45CU17C6N.pdf
(88 pages)
Specifications of EP2AGX45DF29I5
Number Of Logic Elements/cells
42959
Number Of Labs/clbs
1805
Total Ram Bits
3435
Number Of I /o
364
Voltage - Supply
0.87 V ~ 0.93 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
780-FBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Gates
-
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Chapter 2: Logic Array Blocks and Adaptive Logic Modules in Arria II Devices
Adaptive Logic Modules
Figure 2–8. Input Function in Normal Mode
Notes to
(1) If datae1 and dataf1 are used as inputs to a 6-input function, datae0 and dataf0 are available for register packing.
(2) The dataf1 input is available for register packing only if the 6-input function is unregistered.
December 2010 Altera Corporation
Figure
2–8:
For the packing of two 5-input functions into one ALM, the functions must have at
least two common inputs. The common inputs are dataa and datab. The combination
of a 4-input function with a 5-input function requires one common input (either dataa
or datab).
In the case of implementing two 6-input functions in one ALM, four inputs must be
shared and the combinational function must be the same. In a sparsely used device,
functions that could be placed in one ALM may be implemented in separate ALMs by
the Quartus II software to achieve the best possible performance. As a device begins
to fill up, the Quartus II software automatically utilizes the full potential of the
Arria II ALM. The Quartus II Compiler automatically searches for functions using
common inputs or completely independent functions to be placed in one ALM to
make efficient use of device resources. In addition, you can manually control resource
usage by setting location assignments.
Any 6-input function can be implemented using inputs dataa, datab, datac, datad,
and either datae0 and dataf0 or datae1 and dataf1. If datae0 and dataf0 are utilized,
the output is driven to register0, and/or register0 is bypassed and the data drives
out to the interconnect using the top set of output drivers (refer to
datae1 and dataf1 are used, the output either drives to register1 or bypasses
register1 and drives to the interconnect using the bottom set of output drivers. The
Quartus II Compiler automatically selects the inputs to the LUT. ALMs in normal
mode support register packing.
datae0
datae1
dataf0
dataf1
dataa
datab
datad
datac
(2)
6-Input
LUT
(Note 1)
labclk
Arria II Device Handbook Volume 1: Device Interfaces and Integration
D
D
reg0
reg1
Q
Q
To general or
local routing
To general or
local routing
To general or
local routing
Figure
2–8). If
2–9
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