EP2AGX45DF29I5 Altera, EP2AGX45DF29I5 Datasheet - Page 62
![no-image](/images/manufacturer_photos/0/0/40/altera_sml.jpg)
EP2AGX45DF29I5
Manufacturer Part Number
EP2AGX45DF29I5
Description
IC ARRIA II GX FPGA 45K 780FBGA
Manufacturer
Altera
Series
Arria II GXr
Datasheets
1.EP2AGX45CU17C6N.pdf
(96 pages)
2.EP2AGX45CU17C6N.pdf
(14 pages)
3.EP2AGX45CU17C6N.pdf
(692 pages)
4.EP2AGX45CU17C6N.pdf
(10 pages)
5.EP2AGX45CU17C6N.pdf
(88 pages)
Specifications of EP2AGX45DF29I5
Number Of Logic Elements/cells
42959
Number Of Labs/clbs
1805
Total Ram Bits
3435
Number Of I /o
364
Voltage - Supply
0.87 V ~ 0.93 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
780-FBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Gates
-
Available stocks
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Quantity
Price
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Part Number:
EP2AGX45DF29I5N
Manufacturer:
ALTERA
Quantity:
201
Company:
Part Number:
EP2AGX45DF29I5N
Manufacturer:
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Quantity:
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3–16
Arria II Device Handbook Volume 1: Device Interfaces and Integration
Table 3–7
dual-port mode.
Table 3–7. M9K Block Mixed-Width Configuration (True-Dual Port Mode)
Table 3–8
dual-port mode.
Table 3–8. M144K Block Mixed-Width Configurations (True Dual-Port Mode)
In true dual-port mode, M9K and M144K blocks support separate write-enable and
read-enable signals. You can save power by keeping the read-enable signal low
(inactive) when not reading. Read-during-write operations to the same address can
either output “new data” at that location or “old data”.
In true dual-port mode, you can access any memory location at any time from either
port. When accessing the same memory location from both ports, you must avoid
possible write conflicts. A write conflict happens when you attempt to write to the
same address location from both ports at the same time. This results in unknown data
being stored to that address location. Conflict resolution circuitry is not built into the
Arria II memory blocks. You must handle address conflicts external to the RAM block.
16K × 8
8K × 1
4K × 2
2K × 4
1K × 8
512 × 16
1K × 9
512 × 18
8K × 16
4K × 32
16K × 9
8K × 18
4K × 36
Read Port
Read Port
lists the possible M9K block mixed-port width configurations in true
lists the possible M144K block mixed-port width configurations in true
8K × 1
v
v
v
v
v
—
—
16K × 8
v
v
v
—
—
—
4K × 2
v
v
v
v
v
—
—
8K × 16
v
v
v
—
—
—
2K × 4
v
v
v
v
v
—
—
4K × 32
v
v
v
—
—
—
Write Port
Write Port
1K × 8
Chapter 3: Memory Blocks in Arria II Devices
v
v
v
v
v
—
—
16K × 9
—
—
—
v
v
v
December 2010 Altera Corporation
512 × 16 1K × 9 512 × 18
v
v
v
v
v
—
—
8K × 18
v
v
v
—
—
—
—
—
—
—
—
v
v
Memory Modes
4K × 36
v
v
v
—
—
—
—
—
—
—
—
v
v
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