EP2AGX45DF29I5 Altera, EP2AGX45DF29I5 Datasheet - Page 302
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EP2AGX45DF29I5
Manufacturer Part Number
EP2AGX45DF29I5
Description
IC ARRIA II GX FPGA 45K 780FBGA
Manufacturer
Altera
Series
Arria II GXr
Datasheets
1.EP2AGX45CU17C6N.pdf
(96 pages)
2.EP2AGX45CU17C6N.pdf
(14 pages)
3.EP2AGX45CU17C6N.pdf
(692 pages)
4.EP2AGX45CU17C6N.pdf
(10 pages)
5.EP2AGX45CU17C6N.pdf
(88 pages)
Specifications of EP2AGX45DF29I5
Number Of Logic Elements/cells
42959
Number Of Labs/clbs
1805
Total Ram Bits
3435
Number Of I /o
364
Voltage - Supply
0.87 V ~ 0.93 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
780-FBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Gates
-
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9–22
Figure 9–8. Multi-Device AS Configuration When the Devices Receive the Same Data Using a Single .sof
Notes to
(1) Connect the pull-up resistors to the V
(2) The MSEL pin settings vary for different configuration voltage standards and POR delay. To connect MSEL[3..0]for an Arria II GX device, refer to
(3) Arria II devices have an option to select CLKUSR (40 MHz maximum) as the external clock source for DCLK.
(4) Connect the repeater buffers between the Arria II master and slave devices for DATA[0] and DCLK. This is to prevent any potential signal integrity
Arria II Device Handbook Volume 1: Device Interfaces and Integration
devices.
Table 9–6 on page
and clock skew problems.
Figure
9–8:
9–9. To connect MSEL[2..0] for an Arria II GZ device, refer to
Serial Configuration
Device
If the configuration bitstream size exceeds the capacity of a serial configuration
device, you must select a larger configuration device, enable the compression feature,
or both. When configuring multiple devices, the size of the bitstream is the sum of the
configuration bitstreams of the individual devices.
A system may have multiple devices that contain the same configuration data. In AS
chains, you can implement this by storing one copy of the SRAM object file (.sof) in
the serial configuration device. The same copy of the .sof configures the master
Arria II device and all remaining slave devices concurrently. All Arria II devices must
be the same density and package.
To configure four identical Arria II devices with the same .sof, you can set up the
chain similar to the example shown in
and its MSEL pins must be set to select AS configuration. The other three slave devices
are set up for concurrent configuration and their MSEL pins must be set to select PS
configuration. The nCE input pins from the master and slave are connected to GND,
and the DATA and DCLK pins connect in parallel to all four devices. During the
configuration cycle, the master device reads its configuration data from the serial
configuration device and transmits the configuration data to all three slave devices,
configuring all of them simultaneously.
Figure 9–8
same data using a single .sof.
V
CCIO
DATA
DCLK
ASDI
nCS
/
(1)
V
CCPGM
10 kΩ
V
CCIO
CCIO
shows the multi-device AS configuration when the devices receive the
Buffers (4)
/
(1)
V
CCPGM
power supply of I/O bank 3C for Arria II GX devices and to V
10 kΩ
GND
V
CCIO
10 kΩ
Chapter 9: Configuration, Design Security, and Remote System Upgrades in Arria II Devices
/
(1)
V
CCPGM
DATA0
DCLK
nCSO
ASDO
nSTATUS
CONF_DONE
nCONFIG
nCE
Device Master
Arria II
CLKUSR
MSEL[n..0]
nCEO
N.C.
(3)
(2)
GND
Figure
Table 9–7 on page
AS and Fast AS Configuration (Serial Configuration Devices)
9–8. The first device is the master device
nSTATUS
CONF_DONE
nCONFIG
nCE
nSTATUS
CONF_DONE
nCONFIG
nCE
DATA[0]
DCLK
nSTATUS
CONF_DONE
nCONFIG
nCE
DATA[0]
DCLK
DATA[0]
DCLK
CCPGM
9–10.
Device Slave
Device Slave
Device Slave
Arria II
Arria II
Arria II
at a 3.0-V power supply for Arria II GZ
MSEL[n..0]
MSEL[n..0]
December 2010 Altera Corporation
MSEL[n..0]
nCEO
nCEO
nCEO
N.C.
N.C.
N.C.
(2)
(2)
(2)
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