MPC8313ECZQADDC Freescale Semiconductor, MPC8313ECZQADDC Datasheet - Page 11

• Manufacturer Part Number: MPC8313ECZQADDC
• Description: Microprocessors - MPU 8313 REV2.2 PB ENC EXT
• Manufacturer: Freescale Semiconductor

Specifications of MPC8313ECZQADDC

• Processor Series: MPC8313E
• Core: e300
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 133 MHz
• Program Memory Size: 16 KB
• Data Ram Size: 16 KB
• Interface Type: I2C
• Mounting Style: SMD/SMT
• Package / Case: PBGA
• Number Of Programmable I/os: 32
• Number Of Timers: 4

Paragraph
Number
7.3.1.1.1
7.3.1.1.2
7.3.1.1.3
7.3.1.1.4
7.3.1.1.5
7.3.1.2
7.3.1.3
7.3.1.3.1
7.3.1.3.2
7.3.1.3.3
7.3.2
7.3.2.1
7.3.2.2
7.3.3
7.3.3.1
7.3.3.2
7.3.3.3
7.3.4
7.3.4.1
7.3.4.2
7.3.5
7.3.5.1
7.3.5.2
7.3.6
7.3.7
7.3.7.1
7.3.7.2
7.3.8
7.3.8.1
7.4
8.1
8.2
8.3
8.3.1
8.3.2
8.4
8.4.1
Freescale Semiconductor
MPC8313E PowerQUICC™ II Pro Integrated Processor Family Reference Manual, Rev. 2
Introduction...................................................................................................................... 8-1
Features ............................................................................................................................ 8-4
Modes of Operation ......................................................................................................... 8-4
External Signal Description ............................................................................................. 8-5
Differences Between Cores........................................................................................... 7-39
Instruction Set and Addressing Modes ...................................................................... 7-26
Cache Implementation ............................................................................................... 7-28
Interrupt Model .......................................................................................................... 7-30
Memory Management................................................................................................ 7-34
Instruction Timing ..................................................................................................... 7-35
Core Interface ............................................................................................................ 7-36
Debug Features ......................................................................................................... 7-38
Core Enable Mode ....................................................................................................... 8-4
Core Disable Mode ...................................................................................................... 8-5
Overview...................................................................................................................... 8-5
VEA Registers ....................................................................................................... 7-17
OEA Registers ....................................................................................................... 7-17
PowerPC Instruction Set and Addressing Modes.................................................. 7-26
Implementation-Specific Instruction Set ............................................................... 7-27
PowerPC Cache Characteristics ............................................................................ 7-28
Implementation-Specific Cache Organization....................................................... 7-28
Instruction and Data Cache Way-Locking............................................................. 7-30
PowerPC Interrupt Model...................................................................................... 7-30
Implementation-Specific Interrupt Model ............................................................. 7-31
PowerPC Memory Management............................................................................ 7-34
Implementation-Specific Memory Management ................................................... 7-34
Memory Accesses.................................................................................................. 7-37
Signals.................................................................................................................... 7-37
Breakpoint Signaling ............................................................................................. 7-38
Integrated Programmable Interrupt Controller (IPIC)
General-Purpose Registers (GPRs) ................................................................... 7-16
Floating-Point Registers (FPRs)........................................................................ 7-16
Condition Register (CR).................................................................................... 7-16
Floating-Point Status and Control Register (FPSCR) ....................................... 7-16
User-Level SPRs................................................................................................ 7-16
Machine State Register (MSR).......................................................................... 7-17
Segment Registers (SRs) ................................................................................... 7-19
Supervisor-Level SPRs...................................................................................... 7-19
Contents
Chapter 8
Title
Number
Page
xi