MPC8313ECZQADDC Freescale Semiconductor, MPC8313ECZQADDC Datasheet - Page 242
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MPC8313ECZQADDC
Manufacturer Part Number
MPC8313ECZQADDC
Description
Microprocessors - MPU 8313 REV2.2 PB ENC EXT
Manufacturer
Freescale Semiconductor
Datasheet
1.MPC8313CZQADDC.pdf
(1214 pages)
Specifications of MPC8313ECZQADDC
Processor Series
MPC8313E
Core
e300
Data Bus Width
16 bit
Maximum Clock Frequency
133 MHz
Program Memory Size
16 KB
Data Ram Size
16 KB
Interface Type
I2C
Mounting Style
SMD/SMT
Package / Case
PBGA
Number Of Programmable I/os
32
Number Of Timers
4
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System Configuration
5.4.5
5.4.5.1
The device provides a software watchdog timer (WDT) feature to prevent system lock in case the software
becomes trapped in loops with no controlled exit. Watchdog timer operations are configured in the system
watchdog control register (SWCRR).
The software watchdog timer is enabled after reset to cause a soft reset or non-maskable interrupt (MCP)
if it times out. If the software watchdog timer is not needed, the user must clear SWCRR[SWEN] to disable
it. If used, the software watchdog timer requires a special service sequence to be executed periodically.
Without this periodic servicing, the software watchdog timer times out and issues a reset or a nonmaskable
interrupt, as programmed in SWCRR[SWRI]. Once software writes SWRI, the state of SWEN cannot be
changed.
The software watchdog timer service sequence consists of the following two steps:
The service sequence reloads the watchdog timer and the timing process begins again. If a value other than
0x556C or 0xAA39 is written to the SWSRR, the entire sequence must start over. Although the writes must
occur in the correct order before a time-out, any number of instructions can be executed between the
writes. This allows interrupts and exceptions to occur between the two writes when necessary.
shows a state diagram for the watchdog timer.
5-34
•
•
Write 0x556C to the system watchdog service register (SWSRR)
Write 0xAA39 to SWSRR
Functional Description
Software Watchdog Timer Unit
MPC8313E PowerQUICC™ II Pro Integrated Processor Family Reference Manual, Rev. 2
Not 0x556C / Do Not Reload
Reset
Figure 5-22. Software Watchdog Timer Service State Diagram
Waiting for 0x556C
State 0
Not 0xAA39 / Do Not Reload
0x556C / Do Not Reload
0xAA39 / Reload
Waiting for 0xAA39
State 1
Freescale Semiconductor
Figure 5-22
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