MPC8313ECZQADDC Freescale Semiconductor, MPC8313ECZQADDC Datasheet - Page 573

• Manufacturer Part Number: MPC8313ECZQADDC
• Description: Microprocessors - MPU 8313 REV2.2 PB ENC EXT
• Manufacturer: Freescale Semiconductor

Specifications of MPC8313ECZQADDC

• Processor Series: MPC8313E
• Core: e300
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 133 MHz
• Program Memory Size: 16 KB
• Data Ram Size: 16 KB
• Interface Type: I2C
• Mounting Style: SMD/SMT
• Package / Case: PBGA
• Number Of Programmable I/os: 32
• Number Of Timers: 4

12.3.8.4
DMASARn indicates the address from which the DMA controller will be reading data. The software must
ensure that this is a valid memory address.
Table 12-13
12.3.8.5
DMADARn indicates the address to which the DMA controller will be writing data. The software must
ensure that this is a valid memory address.
Table 12-14
Freescale Semiconductor
Offset 0x110, 0x190, 0x210, 0x290
Offset 0x118, 0x198, 0x218, 0x298
Reset
Reset
31–0
31–0
Bits
Bits
W
W
R
R
31
31
Name
Name
SA
DA
describes the DMASARn register.
describes the DMADARn register.
DMA Source Address Register (DMASAR n )
DMA Destination Address Register (DMADAR n )
MPC8313E PowerQUICC™ II Pro Integrated Processor Family Reference Manual, Rev. 2
Source address of DMA transfer. The content of this field is updated after each DMA read operation.
Destination address of DMA transfer.Updated after each DMA write operation.
Figure 12-14. DMA Destination Address Register (DMADAR n )
Figure 12-13. DMA Source Address Register (DMASAR n )
Table 12-13. DMASAR n Field Descriptions
Table 12-14. DMASAR n Field Descriptions
Figure 12-13
Figure 12-14
All zeros
All zeros
SA
DA
Description
Description
shows the DMASARn.
shows the DMADARn fields.
Access: User Read/Write
Access: User Read/Write
DMA/Messaging Unit
12-13
0
0