MPC8313ECZQADDC Freescale Semiconductor, MPC8313ECZQADDC Datasheet - Page 88

Manufacturer Part Number

MPC8313ECZQADDC

Microprocessors - MPU 8313 REV2.2 PB ENC EXT

Manufacturer

Freescale Semiconductor

Processor Series

Data Bus Width

Maximum Clock Frequency

Program Memory Size

Data Ram Size

Interface Type

Mounting Style

Package / Case

Number Of Programmable I/os

Number Of Timers

interrupt routines or other important (time-sensitive) instruction sequences into the instruction cache. It

allows data to be locked into the data cache, which may be important to code that must have deterministic

The e300 core has high-performance 64-bit data bus and 32-bit address bus interfaces to the rest of the

device. The e300 core supports single-beat and burst data transfers for memory accesses, and

memory-mapped I/O operations.

provides a block diagram of the e300 core that shows how the execution units (IU1, IU2, FPU,

BPU, LSU, and SRU) operate independently and in parallel. Note that this is a conceptual diagram and

does not attempt to show how these features are physically implemented on the chip.

MPC8313E PowerQUICC™ II Pro Integrated Processor Family Reference Manual, Rev. 2

Freescale Semiconductor