MPC8313ECZQADDC Freescale Semiconductor, MPC8313ECZQADDC Datasheet - Page 688
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MPC8313ECZQADDC
Manufacturer Part Number
MPC8313ECZQADDC
Description
Microprocessors - MPU 8313 REV2.2 PB ENC EXT
Manufacturer
Freescale Semiconductor
Datasheet
1.MPC8313CZQADDC.pdf
(1214 pages)
Specifications of MPC8313ECZQADDC
Processor Series
MPC8313E
Core
e300
Data Bus Width
16 bit
Maximum Clock Frequency
133 MHz
Program Memory Size
16 KB
Data Ram Size
16 KB
Interface Type
I2C
Mounting Style
SMD/SMT
Package / Case
PBGA
Number Of Programmable I/os
32
Number Of Timers
4
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Security Engine (SEC) 2.2
Table 14-29
14-46
0–48
Bits
49
50
51
52
53
54
55
56
57
58
59
60
Name
ERE
KSE
DSE
OFE
ICE
ME
IFE
IFU
AE
CE
—
—
IE
describes AESUISR fields.
MPC8313E PowerQUICC™ II Pro Integrated Processor Family Reference Manual, Rev. 2
Reserved
Integrity check error
0 No error detected
1 Integrity check error detected. An ICV check was performed and the supplied ICV did not match the one
Reserved
Internal error. An internal processing error was detected while the AESU was processing.
0 No error detected
1 Internal error
Note: This bit will be asserted any time an enabled error condition occurs and can only be cleared by setting
Early read error. The AESU IV register was read while the AESU was processing.
0 No error detected
1 Early read error
Context error. An AESU key register, the key size register, data size register, mode register, or IV register was
modified while AESU was processing
0 No error detected
1 Context error
Key size error. An inappropriate value (not 16, 24 or 32 bytes) was written to the AESU key size register
(AESUKSR).
0 No error detected
1 Key size error
Data size error (DSE): A value was written to the AESU data size register that is not a proper size. See
Section 14.4.3.3, “AESU Data Size Register (AESUDSR).”
0 No error detected
1 Data size error
Mode error. Indicates that invalid data was written to a register or a reserved mode bit was set.
0 Valid data
1 Reserved or invalid mode selected
Address error. An illegal read or write address was detected within the AESU address space.
0 No error detected
1 Address error
Output FIFO error. The shared symmetric output FIFO was detected non-empty upon write of AESU data size
register.
0 No error detected
1 Output FIFO non-empty error
Input FIFO error. The shared symmetric input FIFO was detected non-empty upon generation of done
interrupt.
0 No error detected
1 Input FIFO non-empty error
Input FIFO underflow. The AESU input FIFO has been read while empty.
0 No error detected
1 Input FIFO has had underflow error
computed by the MDEU.
the corresponding bit in the interrupt control register (AESUICR) or by resetting the AESU.
Table 14-29. AESUISR Field Descriptions
Description
Freescale Semiconductor
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