MPC8313ECZQADDC Freescale Semiconductor, MPC8313ECZQADDC Datasheet - Page 61

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MPC8313ECZQADDC

Manufacturer Part Number
MPC8313ECZQADDC
Description
Microprocessors - MPU 8313 REV2.2 PB ENC EXT
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MPC8313ECZQADDC

Processor Series
MPC8313E
Core
e300
Data Bus Width
16 bit
Maximum Clock Frequency
133 MHz
Program Memory Size
16 KB
Data Ram Size
16 KB
Interface Type
I2C
Mounting Style
SMD/SMT
Package / Case
PBGA
Number Of Programmable I/os
32
Number Of Timers
4
Table
Number
10-38
10-39
10-40
10-41
10-42
10-43
10-44
10-45
10-46
10-47
10-48
10-49
11-1
11-2
11-3
11-4
11-5
11-6
12-1
12-2
12-3
12-4
12-5
12-6
12-7
12-8
12-9
12-10
12-11
12-12
12-13
12-14
12-15
12-16
12-17
13-1
13-2
13-3
13-4
13-5
13-6
Freescale Semiconductor
Boot Bank Field Values after Reset for FCM as Boot Controller ...................................... 10-70
UPM Routines Start Addresses........................................................................................... 10-73
RAM Word Field Descriptions ........................................................................................... 10-79
MxMR Loop Field Use ....................................................................................................... 10-84
UPM Address Multiplexing ................................................................................................ 10-85
Data Bus Drive Requirements For Read Cycles ................................................................. 10-93
FCM Register Settings for Soft Reset (ORn[PGS] = 1) ..................................................... 10-94
FCM Register Settings for Status Read (ORn[PGS] = 1) ................................................... 10-94
FCM Register Settings for ID Read (ORn[PGS] = 1) ........................................................ 10-95
FCM Register Settings for Page Read (ORn[PGS] = 1) ..................................................... 10-95
FCM Register Settings for Block Erase (ORn[PGS] = 1) .................................................. 10-96
FCM Register Settings for Page Program (ORn[PGS] = 1) ............................................... 10-97
Sequencer Memory Map....................................................................................................... 11-2
POTARn Field Descriptions ................................................................................................. 11-3
POBARn Field Descriptions................................................................................................. 11-4
POCMRn Field Descriptions ................................................................................................ 11-4
PMCR Field Descriptions ..................................................................................................... 11-5
DTCR Field Descriptions...................................................................................................... 11-6
Module Memory Map ........................................................................................................... 12-2
OMISR Field Descriptions.................................................................................................... 12-4
OMIMR Field Descriptions .................................................................................................. 12-4
IMR0 and IMR1 Field Descriptions ..................................................................................... 12-5
OMR0 and OMR1 Field Descriptions .................................................................................. 12-5
ODR Field Descriptions........................................................................................................ 12-6
IDR Field Descriptions ......................................................................................................... 12-7
IMISR Field Descriptions ..................................................................................................... 12-8
IMIMR Field Descriptions.................................................................................................... 12-8
DMAMRn Field Descriptions............................................................................................... 12-9
DMASRn Field Descriptions .............................................................................................. 12-11
DMACDARn Field Descriptions........................................................................................ 12-12
DMASARn Field Descriptions ........................................................................................... 12-13
DMASARn Field Descriptions ........................................................................................... 12-13
DMABCRn Field Descriptions........................................................................................... 12-14
DMANDARn Field Descriptions........................................................................................ 12-14
DMA Segment Descriptor Fields........................................................................................ 12-18
PCI Controller Modes ........................................................................................................... 13-3
Signal Properties ................................................................................................................... 13-4
PCI Interface Signals—Detailed Signal Descriptions .......................................................... 13-5
PCI Configuration Access Registers................................................................................... 13-11
PCI Memory-Mapped Registers ......................................................................................... 13-12
PCI_CONFIG_ADDRESS Field Descriptions ................................................................... 13-13
MPC8313E PowerQUICC™ II Pro Integrated Processor Family Reference Manual, Rev. 2
Tables
Title
Tables
Number
Page
lxi

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