MPC8313ECZQADDC Freescale Semiconductor, MPC8313ECZQADDC Datasheet - Page 124

• Manufacturer Part Number: MPC8313ECZQADDC
• Description: Microprocessors - MPU 8313 REV2.2 PB ENC EXT
• Manufacturer: Freescale Semiconductor

Specifications of MPC8313ECZQADDC

• Processor Series: MPC8313E
• Core: e300
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 133 MHz
• Program Memory Size: 16 KB
• Data Ram Size: 16 KB
• Interface Type: I2C
• Mounting Style: SMD/SMT
• Package / Case: PBGA
• Number Of Programmable I/os: 32
• Number Of Timers: 4

Memory Map
2-20
0x2_42D0–
0x2_4288–
0x2_4308–
0x2_4318–
0x2_4344–
0x2_42BC
0x2_42CC
0x2_42FC
0x2_42C0
0x2_42C4
0x2_42C8
0x2_430C
0x2_432C
0x2_433C
0x2_438C
0x2_439C
0x2_43A0
0x2_43A4
0x2_43A8
0x2_4284
0x2_4300
0x2_4304
0x2_4310
0x2_4314
0x2_4330
0x2_4334
0x2_4338
0x2_4340
0x2_4380
0x2_4380
0x2_4384
0x2_4388
0x2_4390
0x2_4394
0x2_4398
Offset
TMR_TXTS2_ID* - Tx timestamp identification tag (set 2)
Reserved
TMR_TXTS1_H* - Tx timestamp high (set 1)
TMR_TXTS1_L* - Tx timestamp high (set 1)
TMR_TXTS2_H* - Tx timestamp high (set 2)
TMR_TXTS2_L* - Tx timestamp high (set 2)
Reserved
RCTRL—Receive control register
RSTAT—Receive status register
Reserved
RXIC—Receive interrupt coalescing register
RQUEUE*—Receive queue control register.
Reserved
RBIFX*—Receive bit field extract control register
RQFAR*—Receive queue filing table address register
RQFCR*—Receive queue filing table control register
RQFPR*—Receive queue filing table property register
MRBLR—Maximum receive buffer length register
Reserved
RBDBPH*—Rx data buffer pointer high bits
RBPTR0—RxBD pointer for ring 0
Reserved
RBPTR1*—RxBD pointer for ring 1
Reserved
RBPTR2*—RxBD pointer for ring 2
Reserved
RBPTR3*—RxBD pointer for ring 3
Reserved
RBPTR4*—RxBD pointer for ring 4
Reserved
MPC8313E PowerQUICC™ II Pro Integrated Processor Family Reference Manual, Rev. 2
eTSEC Receive Control and Status Registers
Register
Table 2-2. Memory Map (continued)
Access
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
w1c
—
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—
—
—
—
—
—
—
—
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0080_0080
0x0000_0000
0x0000_0000
0x nnnn_nnnn
0x nnnn_nnnn
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
Reset
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