MPC8313ECZQADDC Freescale Semiconductor, MPC8313ECZQADDC Datasheet - Page 747
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MPC8313ECZQADDC
Manufacturer Part Number
MPC8313ECZQADDC
Description
Microprocessors - MPU 8313 REV2.2 PB ENC EXT
Manufacturer
Freescale Semiconductor
Datasheet
1.MPC8313CZQADDC.pdf
(1214 pages)
Specifications of MPC8313ECZQADDC
Processor Series
MPC8313E
Core
e300
Data Bus Width
16 bit
Maximum Clock Frequency
133 MHz
Program Memory Size
16 KB
Data Ram Size
16 KB
Interface Type
I2C
Mounting Style
SMD/SMT
Package / Case
PBGA
Number Of Programmable I/os
32
Number Of Timers
4
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15.5.3.1.5
Figure 15-6
disable an error interruption, possibly to avoid spurious error indications external to the eTSECs.
Freescale Semiconductor
Offset eTSEC1:0x2_4018; eTSEC2:0x2_5018
Reset
Reset
17–19
25–26
Bits
10
11
12
13
14
15
16
20
21
22
23
24
27
28
29
30
31
W
W
R
R
16
0
—
MMWREN
MMRDEN
GRSCEN
PERREN
XFUNEN
MAGEN
FGPIEN
CRLEN
RXBEN
DPEEN
TXBEN
TXFEN
RXFEN
FIREN
FIQEN
Name
LCEN
describes the definition for the EDIS register. The error disabled register allows the user to
1
—
—
—
MPC8313E PowerQUICC™ II Pro Integrated Processor Family Reference Manual, Rev. 2
Error Disabled Register (EDIS)
BSYDIS EBERRDIS
2
Transmit buffer interrupt enable
Transmit frame interrupt enable
Reserved
Late collision enable
Collision retry limit enable
Transmit FIFO underrun enable
Receive buffer interrupt enable
Reserved
Magic packet received interrupt enable
MII management read completion interrupt enable
MII management write completion interrupt enable
Graceful receive stop complete interrupt enable
Receive frame interrupt enable
Reserved
Filer general purpose interrupt enable
Filer invalid result interrupt enable
Filed frame to invalid queue interrupt enable
Data parity error interrupt enable
Receive frame parse error enable
3
Table 15-9. IMASK Field Descriptions (continued)
Figure 15-6. EDIS Register Definition
4
—
—
6
BABTDIS — TXEDIS
7
All zeros
All zeros
8
Description
9
10
Enhanced Three-Speed Ethernet Controllers
27
—
FIRDIS FIQDIS DPEDIS PERRDIS
12
28
LCDIS CRLDIS XFUNDIS
13
29
Access: Read/Write
14
30
15
31
15-29
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