MPC8313ECZQADDC Freescale Semiconductor, MPC8313ECZQADDC Datasheet - Page 748
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MPC8313ECZQADDC
Manufacturer Part Number
MPC8313ECZQADDC
Description
Microprocessors - MPU 8313 REV2.2 PB ENC EXT
Manufacturer
Freescale Semiconductor
Datasheet
1.MPC8313CZQADDC.pdf
(1214 pages)
Specifications of MPC8313ECZQADDC
Processor Series
MPC8313E
Core
e300
Data Bus Width
16 bit
Maximum Clock Frequency
133 MHz
Program Memory Size
16 KB
Data Ram Size
16 KB
Interface Type
I2C
Mounting Style
SMD/SMT
Package / Case
PBGA
Number Of Programmable I/os
32
Number Of Timers
4
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Enhanced Three-Speed Ethernet Controllers
Table 15-10
15-30
10–12
16–27
Bits
0–1
4–6
13
14
15
28
29
2
3
7
8
9
EBERRDIS Ethernet controller bus error disable.
XFUNDIS
BABTDIS
BSYDIS
TXEDIS
CRLDIS
FIRDIS
FIQDIS
LCDIS
Name
—
—
—
—
—
describes the fields of the EDIS register.
MPC8313E PowerQUICC™ II Pro Integrated Processor Family Reference Manual, Rev. 2
Reserved
Busy disable.
0 Allow eTSEC to report IEVENT[BSY] status and halt buffer descriptor queue if BSY condition occurs.
1 Do not set IEVENT[BSY] and do not halt buffer descriptor queue if BSY condition occurs.
0 Allow eTSEC to report IEVENT[EBERR] status and halt buffer descriptor queue if EBERR condition
1 Do not set IEVENT[EBERR] and do not halt buffer descriptor queue if EBERR condition occurs.
Reserved
Babbling transmit error disable.
0 Allow eTSEC to report IEVENT[BABT] status and set the buffer descriptor TR field.
1 Do not set IEVENT[BABT] nor the buffer descriptor TR field.
Reserved
Transmit error disable.
0 Allow eTSEC to report IEVENT[TXE] status.
1 Do not set IEVENT[TXE] if TXE condition occurs.
Reserved
Late collision disable.
0 Allow eTSEC to report IEVENT[LC] status, set the buffer descriptor LC field, and halt buffer descriptor
1 Do not set IEVENT[LC] nor the buffer descriptor LC field, and do not halt buffer descriptor queue if
Collision retry limit disable.
0 Allow eTSEC to report IEVENT[CRL] status, set the buffer descriptor RL field, and halt buffer
1 Do not set IEVENT[CRL] nor the buffer descriptor RL field, and do not halt buffer descriptor queue if
Transmit FIFO underrun disable.
0 Allow eTSEC to report IEVENT[XFUN] status, set the buffer descriptor UN field, and halt buffer
1 Do not set IEVENT[XFUN] nor the buffer descriptor UN field, and do not halt buffer descriptor queue
Reserved
Filer invalid result error disable.
0 Allow eTSEC to report IEVENT[FIR] status.
1 Do not set IEVENT[FIR] if eTSEC fails to reach a definite filer result when attempting to file a received
Filed frame to invalid queue error disable.
0 Allow eTSEC to report IEVENT[FIQ] status.
1 Do not set IEVENT[FIQ] if eTSEC attempts to file a received frame to an invalid (disabled) RxBD ring,
occurs.
queue if LC condition occurs.
LC condition occurs.
descriptor queue if CRL condition occurs.
CRL condition occurs.
descriptor queue if XFUN condition occurs.
if XFUN condition occurs.
frame, but discard the frame silently.
but discard the frame silently.
Table 15-10. EDIS Field Descriptions
Description
Freescale Semiconductor
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