MC9S08JM32CLD Freescale Semiconductor, MC9S08JM32CLD Datasheet - Page 22

IC MCU 8BIT 32K FLASH 44-LQFP

MC9S08JM32CLD

Manufacturer Part Number
MC9S08JM32CLD
Description
IC MCU 8BIT 32K FLASH 44-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS08r
Datasheet

Specifications of MC9S08JM32CLD

Core Processor
HCS08
Core Size
8-Bit
Speed
48MHz
Connectivity
I²C, LIN, SCI, SPI, USB
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
33
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
44-LQFP
Processor Series
S08JM
Core
HCS08
Data Bus Width
8 bit
Data Ram Size
2 KB
Interface Type
SCI/SPI
Maximum Clock Frequency
24 MHz
Number Of Programmable I/os
33
Number Of Timers
8
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWS08
Development Tools By Supplier
DEMOJM, DEMOJMSKT, DEMOFLEXISJMSD, DEMO9S08JM16
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 12-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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0
EXTAL
Chapter 1 Device Overview
The MCG supplies the following clock sources:
22
1. The FFCLK is internally synchronized to the bus clock and must not exceed one half of the bus clock frequency.
2. ADC has min. and max. frequency requirements. See
and
3. Flash has the frequency requirements for program and erase operation. See the
details.
MCG
XOSC
1 kHz
LPO
Appendix A, “Electrical
XTAL
MCGOUT — This clock source is used as the CPU, USB RAM and USB module clock, and is
divided by two to generate the peripheral bus clock (BUSCLK). Control bits in the MCG control
registers determine which of the three clock sources is connected:
— Internal reference clock
— External reference clock
— Frequency-locked loop (FLL) or Phase-locked loop (PLL) output
See
MCGOUT clock.
MCGLCLK — This clock source is derived from the digitally controlled oscillator (DCO) of the
MCG. Development tools can select this internal self-clocked source to speed up BDC
communications in systems where the bus clock is slow.
MCGIRCLK — This is the internal reference clock and can be selected as the real-time counter
clock source.
MCGIRCLK in more detail. See
information regarding the use of MCGIRCLK.
MCGERCLK — This is the external reference clock and can be selected as the clock source of
real-time counter and ADC module.
MCGERCLK in more detail. See
Chapter 12, “Multi-Purpose Clock Generator
MCGERCLK
MCGFFCLK
MCGIRCLK
LPO clock
MCGOUT
MCGLCLK
USB RAM
Chapter 12, “Multi-Purpose Clock Generator
÷
÷
Characteristics,” for details.
USB
2
2
BUSCLK
Figure 1-2. System Clock Distribution Diagram
RTC
CPU
MC9S08JM60 Series Data Sheet, Rev. 3
COP
TPMCLK
Chapter 13, “Real-Time Counter
Chapter 13, “Real-Time Counter
BDC
Section 12.4.6, “External Reference
TPM1
Chapter 10, “Analog-to-Digital Converter
FFCLK
1
TPM2
(S08MCGV1),” for details on configuring the
IIC
(S08MCGV1),” explains the
Appendix A, “Electrical
ADC
2
(S08RTCV1),” and
SCI1
(S08RTCV1),” for more
RAM
Clock,” explains the
(S08ADC12V1),”
SCI2
Freescale Semiconductor
Characteristics,” for
Flash
SPI1
Chapter 10,
3
SPI2

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