MC9S08JM32CLD Freescale Semiconductor, MC9S08JM32CLD Datasheet - Page 299

• Manufacturer Part Number: MC9S08JM32CLD
• Description: IC MCU 8BIT 32K FLASH 44-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HCS08r

Specifications of MC9S08JM32CLD

• Core Processor: HCS08
• Core Size: 8-Bit
• Speed: 48MHz
• Connectivity: I²C, LIN, SCI, SPI, USB
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 33
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-LQFP
• Processor Series: S08JM
• Core: HCS08
• Data Bus Width: 8 bit
• Data Ram Size: 2 KB
• Interface Type: SCI/SPI
• Maximum Clock Frequency: 24 MHz
• Number Of Programmable I/os: 33
• Number Of Timers: 8
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWS08
• Development Tools By Supplier: DEMOJM, DEMOJMSKT, DEMOFLEXISJMSD, DEMO9S08JM16
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8-ch x 12-bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

17.1.6
Figure 17-2
Freescale Semiconductor
Mode
Stop3
Wait
24-MHz Clock (bus clk)
48-MHz Reference Clock
Block Diagram
is a block diagram of the USB module.
The USB module is optionally available in stop3.
A reduced current consumption mode may be required for USB suspend mode per USB Specification Rev. 2.0,
and stop3 mode is useful for achieving lower current consumption for the MCU and hence the overall USB
device. Before entering stop3 via firmware, the user must ensure that the device settings are configured for
stop3 to achieve USB suspend current consumption targets.
The USB module is notified about entering suspend mode when the SLEEPF flag is set; this occurs after the
USB bus is idle for 3 ms. The device USB suspend mode current consumption level requirements are defined
by the USB Specification Rev. 2.0 (500 μA for low-power and 2.5 mA for high-power with remote-wakeup
enabled).
If USBRESMEN in USBCTL0 is set, and a K-state (resume signaling) is detected on the USB bus, the LPRESF
bit in USBCTL0 will be set. This triggers an asynchronous interrupt that will wakeup the MCU from stop3 mode
and enable clocks to the USB module. The USBRESMEN bit must then be cleared immediately after stop3
recovery to clear the LPRESF flag bit.
USB module is operational.
IRQ
USB CONTROLLER
Table 17-2. Operating Modes (continued)
Figure 17-2. USB Module Block Diagram
MC9S08JM60 Series Data Sheet, Rev. 3
USB RAM
256 bytes
Description
Serial Interface Engine
(SIE)
Initiator
Target
BVCI
BVCI
Protocol and Rate
Match
Universal Serial Bus Device Controller (S08USBV1)
Logic
Logic
RX
TX
Enable
USBDP Pullup
XCVR
VREG
V
USBDN
USBDP
USB33
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