MC9S08JM32CLD Freescale Semiconductor, MC9S08JM32CLD Datasheet - Page 55

• Manufacturer Part Number: MC9S08JM32CLD
• Description: IC MCU 8BIT 32K FLASH 44-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HCS08r

Specifications of MC9S08JM32CLD

• Core Processor: HCS08
• Core Size: 8-Bit
• Speed: 48MHz
• Connectivity: I²C, LIN, SCI, SPI, USB
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 33
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-LQFP
• Processor Series: S08JM
• Core: HCS08
• Data Bus Width: 8 bit
• Data Ram Size: 2 KB
• Interface Type: SCI/SPI
• Maximum Clock Frequency: 24 MHz
• Number Of Programmable I/os: 33
• Number Of Timers: 8
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWS08
• Development Tools By Supplier: DEMOJM, DEMOJMSKT, DEMOFLEXISJMSD, DEMO9S08JM16
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8-ch x 12-bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

4.5.5
An access error occurs whenever the command execution protocol is violated.
Any of the following specific actions will cause the access error flag (FACCERR) in FSTAT to be set.
FACCERR must be cleared by writing a 1 to FACCERR in FSTAT before any command can be processed.
Freescale Semiconductor
•
•
•
Writing to a flash address before the internal flash clock frequency has been set by writing to the
FCDIV register
command buffer is empty.)
Writing a second time to a flash address before launching the previous command (There is only
one write to flash for every command.)
Writing to a flash address while FCBEF is not set (A new command cannot be started until the
PROGRAM FLOW
FLASH BURST
Access Errors
Figure 4-3. Flash Burst Program Flowchart
YES
MC9S08JM60 Series Data Sheet, Rev. 3
WRITE COMMAND (0x25) TO FCMD
0
TO BUFFER ADDRESS AND DATA
AND CLEAR FCBEF
NEW BURST COMMAND ?
TO LAUNCH COMMAND
WRITE TO FCDIV
WRITE 1 TO FCBEF
WRITE TO FLASH
CLEAR ERROR
FACCERR ?
FACCERR ?
FPVIO OR
FCBEF ?
FCCF ?
START
DONE
1
1
NO
1
NO
(Note 1)
(Note 2)
YES
0
0
Note 2: Wait at least four bus cycles before
Note 1: Required only once after reset.
ERROR EXIT
checking FCBEF or FCCF.
Chapter 4 Memory
55