MC9S08JM32CLD Freescale Semiconductor, MC9S08JM32CLD Datasheet - Page 53

IC MCU 8BIT 32K FLASH 44-LQFP

MC9S08JM32CLD

Manufacturer Part Number
MC9S08JM32CLD
Description
IC MCU 8BIT 32K FLASH 44-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS08r
Datasheet

Specifications of MC9S08JM32CLD

Core Processor
HCS08
Core Size
8-Bit
Speed
48MHz
Connectivity
I²C, LIN, SCI, SPI, USB
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
33
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
44-LQFP
Processor Series
S08JM
Core
HCS08
Data Bus Width
8 bit
Data Ram Size
2 KB
Interface Type
SCI/SPI
Maximum Clock Frequency
24 MHz
Number Of Programmable I/os
33
Number Of Timers
8
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWS08
Development Tools By Supplier
DEMOJM, DEMOJMSKT, DEMOFLEXISJMSD, DEMO9S08JM16
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 12-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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0
A partial command sequence can be aborted manually by writing a 0 to FCBEF any time after the write to
the memory array and before writing the 1 that clears FCBEF and launches the complete command.
Aborting a command in this way sets the FACCERR access error flag which must be cleared before
starting a new command.
A strictly monitored procedure must be obeyed or the command will not be accepted. This minimizes the
possibility of any unintended changes to the flash memory contents. The command complete flag (FCCF)
indicates when a command is complete. The command sequence must be completed by clearing FCBEF
to launch the command.
programming. The FCDIV register must be initialized before using any flash commands. This only must
be done once following a reset.
Freescale Semiconductor
2. Write the command code for the desired command to FCMD. The five valid commands are blank
3. Write a 1 to the FCBEF bit in FSTAT to clear FCBEF and launch the command (including its
check (0x05), byte program (0x20), burst program (0x25), page erase (0x40), and mass erase
(0x41). The command code is latched into the command buffer.
address and data information).
FLASH PROGRAM AND
ERASE FLOW
Figure 4-2
Figure 4-2. Flash Program and Erase Flowchart
MC9S08JM60 Series Data Sheet, Rev. 3
is a flowchart for executing all of the commands except for burst
0
TO BUFFER ADDRESS AND DATA
WRITE COMMAND TO FCMD
AND CLEAR FCBEF
TO LAUNCH COMMAND
WRITE TO FCDIV
WRITE 1 TO FCBEF
WRITE TO FLASH
CLEAR ERROR
FACCERR ?
FPVIOL OR
FACCERR ?
FCCF ?
START
DONE
1
NO
1
(Note 1)
(Note 2)
YES
0
Note 2: Wait at least four bus cycles
Note 1: Required only once after reset.
ERROR EXIT
before checking FCBEF or FCCF.
Chapter 4 Memory
53

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