MC9S08JM32CLD Freescale Semiconductor, MC9S08JM32CLD Datasheet - Page 351

IC MCU 8BIT 32K FLASH 44-LQFP

MC9S08JM32CLD

Manufacturer Part Number
MC9S08JM32CLD
Description
IC MCU 8BIT 32K FLASH 44-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS08r
Datasheet

Specifications of MC9S08JM32CLD

Core Processor
HCS08
Core Size
8-Bit
Speed
48MHz
Connectivity
I²C, LIN, SCI, SPI, USB
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
33
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
44-LQFP
Processor Series
S08JM
Core
HCS08
Data Bus Width
8 bit
Data Ram Size
2 KB
Interface Type
SCI/SPI
Maximum Clock Frequency
24 MHz
Number Of Programmable I/os
33
Number Of Timers
8
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWS08
Development Tools By Supplier
DEMOJM, DEMOJMSKT, DEMOFLEXISJMSD, DEMO9S08JM16
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 12-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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0
The average chip-junction temperature (T
where:
T
θ
P
P
P
For most applications, P
(if P
Solving equations 1 and 2 for K gives:
where K is a constant pertaining to the particular part. K can be determined from equation 3 by measuring
P
solving equations 1 and 2 iteratively for any value of T
A.5
Although damage from electrostatic discharge (ESD) is much less common on these devices than on early
CMOS circuits, normal handling precautions must be used to avoid exposure to static discharge.
Qualification tests are performed to ensure that these devices can withstand exposure to reasonable levels
of static without suffering any permanent damage.
All ESD testing is in conformity with AEC-Q100 Stress Test Qualification for Automotive Grade
Integrated Circuits. During the device qualification ESD stresses were performed for the Human Body
Model (HBM) and the Charge Device Model (CDM).
A device is defined as a failure if after exposure to ESD pulses the device no longer meets the device
specification. Complete DC parametric and functional testing is performed per the applicable device
specification at room temperature followed by hot temperature, unless specified otherwise in the device
specification.
Freescale Semiconductor
JA
A
D
int
I/O
D
= Ambient temperature, °C
= P
(at equilibrium) for a known T
= Package thermal resistance, junction-to-ambient, °C/W
= I
I/O
= Power dissipation on input and output pins — user determined
int
DD
is neglected) is:
+ P
ESD Protection and Latch-Up Immunity
× V
I/O
DD
, Watts — chip internal power
I/O
<< P
K = P
int
A
and can be neglected. An approximate relationship between P
MC9S08JM60 Series Data Sheet, Rev. 3
. Using this value of K, the values of P
D
P
T
× (T
D
J
= K ÷ (T
= T
J
A
) in °C can be obtained from:
+ 273°C) + θ
A
+ (P
J
D
+ 273°C)
× θ
A
JA
JA
.
)
× (P
D
)
2
D
Appendix A Electrical Characteristics
and T
J
can be obtained by
D
Eqn. A-1
Eqn. A-2
Eqn. A-3
and T
351
J

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