MC9S12NE64CPV Freescale Semiconductor, MC9S12NE64CPV Datasheet - Page 110

• Manufacturer Part Number: MC9S12NE64CPV
• Description: IC MCU 25MHZ ETHERNT/PHY 112LQFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of MC9S12NE64CPV

• Mfg Application Notes: MC9S12NE64 Integrated Ethernet Controller Implementing an Ethernet Interface with the MC9S12NE64 Web Server Development with MC9S12NE64 and Open TCP
• Core Processor: HCS12
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: EBI/EMI, Ethernet, I²C, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 70
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.375 V ~ 3.465 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 112-LQFP
• Data Bus Width: 16 bit
• Data Ram Size: 8 KB
• Interface Type: I2C, SCI, SPI
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 70
• Number Of Timers: 16 bit
• Operating Supply Voltage: - 0.3 V to + 3 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 65 C
• On-chip Adc: 10 bit
• For Use With: EVB9S12NE64E - BOARD EVAL FOR 9S12NE64DEMO9S12NE64E - DEMO BOARD FOR 9S12NE64
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: No RoHS Version Available

Chapter 3 Port Integration Module (PIM9NE64V1)
3.3
This section provides a detailed description of all registers.
3.3.1
Table 3-2
110
Port S
Port T
Port
Memory Map and Register Descriptions
shows the memory map of the port integration module.
Module Memory Map
Pin Name
PT[7:4]
PS[7]
PS[6]
PS[5]
PS[4]
PS[3]
PS[2]
PS[1]
PS[0]
Address
Offset
$00
$01
$02
$03
$04
$05
Pin Function
Port T I/O Register (PTT)
Port T Input Register (PTIT)
Port T Data Direction Register (DDRT)
Port T Reduced Drive Register (RDRT)
Port T Pull Device Enable Register (PERT)
Port T Polarity Select Register (PPST)
SCI1_RXD
SCI0_RXD
SCI1_TXD
SCI0_TXD
SPI_MOSI
SPI_MISO
SPI_SCK
Table 3-1. Pin Functions and Priorities (Sheet 4 of 4)
IOC[7:4]
SPI_SS
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
Table 3-2. PIM Module Memory Map
MC9S12NE64 Data Sheet, Rev. 1.1
Serial Peripheral Interface slave select output in master
mode, input in slave mode or master mode.
General-purpose I/O
Serial Peripheral Interface serial clock pin
General-purpose I/O
Serial Peripheral Interface master out/slave in pin
General-purpose I/O
Serial Peripheral Interface master in/slave out pin
General-purpose I/O
Serial Communication Interface 1 transmit pin
General-purpose I/O
Serial Communication Interface 1 receive pin
General-purpose I/O
Serial Communication Interface 0 transmit pin
General-purpose I/O
Serial Communication Interface 0 receive pin
General-purpose I/O
Standard Timer1 Channels 7 to 4
General-purpose I/O
Use
Description
Access
R/W
R/W
R/W
R/W
R/W
R
Freescale Semiconductor
Pin Function
after Reset
GPIO
GPIO