MC9S12NE64CPV Freescale Semiconductor, MC9S12NE64CPV Datasheet - Page 475

• Manufacturer Part Number: MC9S12NE64CPV
• Description: IC MCU 25MHZ ETHERNT/PHY 112LQFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of MC9S12NE64CPV

• Mfg Application Notes: MC9S12NE64 Integrated Ethernet Controller Implementing an Ethernet Interface with the MC9S12NE64 Web Server Development with MC9S12NE64 and Open TCP
• Core Processor: HCS12
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: EBI/EMI, Ethernet, I²C, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 70
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.375 V ~ 3.465 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 112-LQFP
• Data Bus Width: 16 bit
• Data Ram Size: 8 KB
• Interface Type: I2C, SCI, SPI
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 70
• Number Of Timers: 16 bit
• Operating Supply Voltage: - 0.3 V to + 3 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 65 C
• On-chip Adc: 10 bit
• For Use With: EVB9S12NE64E - BOARD EVAL FOR 9S12NE64DEMO9S12NE64E - DEMO BOARD FOR 9S12NE64
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: No RoHS Version Available

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Freescale Semiconductor
The DBG module is designed for backwards compatibility to existing BKP modules. Register and bit names have changed from
the BKP module. This column shows the DBG register name, as well as the BKP register name for reference.
Comparator C can be used to enhance the BKP mode by providing a third breakpoint.
DBGCCX
DBGCCH
DBGCCL
DBGTBH
DBGCNT
DBGCAX
DBGCAH
DBGCBX
DBGCBH
DBGCAL
DBGCBL
DBGTBL
BKPCT0
BKPCT1
DBGC2
DBGC3
BKP0H
BKP1H
Name
BKP0X
BKP0L
BKP1X
BKP1L
1
(2)
(2)
(2)
W
W
W
W
W
W
W
W
W
W
W
W
W
W
R
R
R
R
R
R
R
R
R
R
R
R
R
R
BKAMBH
BKABEN
Bit 15
Bit 15
Bit 15
Bit 15
Bit 7
Bit 7
Bit 7
Bit 7
Bit 7
TBF
PAGSEL
PAGSEL
PAGSEL
Figure 18-3. DBG Register Summary (continued)
= Unimplemented or Reserved
BKAMBL
Bit 14
FULL
Bit 6
14
14
14
6
0
6
6
6
MC9S12NE64 Data Sheet, Rev. 1.1
BKBMBH
Bit 13
BDM
Bit 5
13
13
13
5
5
5
5
BKBMBL
TAGAB
Bit 12
Bit 4
12
12
12
4
4
4
4
RWAEN
BKCEN
Bit 11
Bit 3
11
11
11
3
3
3
3
EXTCMP
EXTCMP
EXTCMP
CNT
Memory Map and Register Definition
TAGC
Bit 10
RWA
Bit 2
10
10
10
2
2
2
2
RWCEN
RWBEN
Bit 9
Bit 1
1
9
1
9
1
9
1
RWC
RWB
Bit 0
Bit 8
Bit 0
Bit 8
Bit 0
Bit 8
Bit 0
Bit 8
Bit 0
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