MC9S12NE64CPV Freescale Semiconductor, MC9S12NE64CPV Datasheet - Page 481

• Manufacturer Part Number: MC9S12NE64CPV
• Description: IC MCU 25MHZ ETHERNT/PHY 112LQFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of MC9S12NE64CPV

• Mfg Application Notes: MC9S12NE64 Integrated Ethernet Controller Implementing an Ethernet Interface with the MC9S12NE64 Web Server Development with MC9S12NE64 and Open TCP
• Core Processor: HCS12
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: EBI/EMI, Ethernet, I²C, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 70
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.375 V ~ 3.465 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 112-LQFP
• Data Bus Width: 16 bit
• Data Ram Size: 8 KB
• Interface Type: I2C, SCI, SPI
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 70
• Number Of Timers: 16 bit
• Operating Supply Voltage: - 0.3 V to + 3 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 65 C
• On-chip Adc: 10 bit
• For Use With: EVB9S12NE64E - BOARD EVAL FOR 9S12NE64DEMO9S12NE64E - DEMO BOARD FOR 9S12NE64
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: No RoHS Version Available

18.3.2.5
1
2
3
Freescale Semiconductor
EXTCMP
See
Current HCS12 implementations have PPAGE limited to 6 bits. Therefore, EXTCMP[5:4] should be set to 00.
Data page (DPAGE) and Extra page (EPAGE) are reserved for implementation on devices that support paged data and extra
space.
PAGSEL
PAGSEL
Reset
Field
10
11
7:6
5:0
00
01
Figure
W
R
3
2
18-10.
Page Selector Field — In both BKP and DBG mode, PAGSEL selects the type of paging as shown in
Table
DPAGE and EPAGE are not yet implemented so the value in bit 7 will be ignored (i.e., PAGSEL values of 10 and
11 will be interpreted as values of 00 and 01, respectively).
Comparator C Extended Compare Bits — The EXTCMP bits are used as comparison address bits as shown
in
Note: Comparator C can be used when the DBG module is configured for BKP mode. Extended addressing
Debug Comparator C Extended Register (DBGCCX)
0
7
Table 18-11
PAGSEL
18-11.
comparisons for comparator C use PAGSEL and will operate differently to the way that comparator A and
B operate in BKP mode.
(256 — 16K pages)
DPAGE (reserved)
(256 — 4K pages)
EPAGE (reserved)
(256 — 1K pages)
Normal (64k)
Figure 18-9. Debug Comparator C Extended Register (DBGCCX)
Description
PPAGE
along with the appropriate PPAGE, DPAGE, or EPAGE signal from the core.
0
6
Table 18-10. DBGCCX Field Descriptions
Table 18-11. PAGSEL Decoding
MC9S12NE64 Data Sheet, Rev. 1.1
0
5
EXTCMP[5:0] is compared to
EXTCMP[3:0] is compared to
EXTCMP[1:0] is compared to
address bits [21:16]
address bits [19:16]
address bits [17:16]
0
4
EXTCMP
Not used
Description
2
0
3
EXTCMP
1
DPAGE / XAB[21:14] becomes address
EPAGE / XAB[21:14] becomes address
PPAGE[7:0] / XAB[21:14] becomes
0
2
Memory Map and Register Definition
address bits [21:14]
No paged memory
bits [19:12]
bits [17:10]
Comment
0
1
1
0
0
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