MC9S12NE64CPV Freescale Semiconductor, MC9S12NE64CPV Datasheet - Page 412

IC MCU 25MHZ ETHERNT/PHY 112LQFP

MC9S12NE64CPV

Manufacturer Part Number
MC9S12NE64CPV
Description
IC MCU 25MHZ ETHERNT/PHY 112LQFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet

Specifications of MC9S12NE64CPV

Mfg Application Notes
MC9S12NE64 Integrated Ethernet Controller Implementing an Ethernet Interface with the MC9S12NE64 Web Server Development with MC9S12NE64 and Open TCP
Core Processor
HCS12
Core Size
16-Bit
Speed
25MHz
Connectivity
EBI/EMI, Ethernet, I²C, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
70
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.375 V ~ 3.465 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
112-LQFP
Data Bus Width
16 bit
Data Ram Size
8 KB
Interface Type
I2C, SCI, SPI
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
70
Number Of Timers
16 bit
Operating Supply Voltage
- 0.3 V to + 3 V
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 65 C
On-chip Adc
10 bit
For Use With
EVB9S12NE64E - BOARD EVAL FOR 9S12NE64DEMO9S12NE64E - DEMO BOARD FOR 9S12NE64
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Lead Free Status / Rohs Status
No RoHS Version Available

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Chapter 15 Multiplexed External Bus Interface (MEBIV3)
This register is not in the on-chip memory map in expanded and special peripheral modes. Therefore, these
accesses will be echoed externally.
15.3.2.11 Reduced Drive Register (RDRIV)
Read: Anytime (provided this register is in the map)
Write: Anytime (provided this register is in the map)
This register is used to select reduced drive for the pins associated with the core ports. This gives reduced
power consumption and reduced RFI with a slight increase in transition time (depending on loading). This
feature would be used on ports which have a light loading. The reduced drive function is independent of
which function is being used on a particular port.
This register is not in the on-chip memory map in expanded and special peripheral modes. Therefore, these
accesses will be echoed externally.
412
PUPKE
PUPEE
PUPBE
PUPAE
Field
7
4
1
0
Reset
W
R
Pull resistors Port K Enable
0 Port K pull resistors are disabled.
1 Enable pull resistors for port K input pins.
Pull resistors Port E Enable
0 Port E pull resistors on bits 7, 4:0 are disabled.
1 Enable pull resistors for port E input pins bits 7, 4:0.
Note: Pins 5 and 6 of port E have pull resistors which are only enabled during reset. This bit has no effect on
Pull resistors Port B Enable
0 Port B pull resistors are disabled.
1 Enable pull resistors for all port B input pins.
Pull resistors Port A Enable
0 Port A pull resistors are disabled.
1 Enable pull resistors for all port A input pins.
RDRK
These bits have no effect when the associated pin(s) are outputs. (The pull
resistors are inactive.)
0
7
these pins.
= Unimplemented or Reserved
0
0
6
Figure 15-15. Reduced Drive Register (RDRIV)
Table 15-9. PUCR Field Descriptions
MC9S12NE64 Data Sheet, Rev. 1.1
0
0
5
NOTE
RDPE
0
4
Description
3
0
0
2
0
0
Freescale Semiconductor
RDPB
0
1
RDPA
0
0

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